Searched refs:fp32 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/test/CodeGen/R600/ |
| D | default-fp-mode.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check-pr…
2 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check-pr…
3 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check-pr…
4 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check-pr…
6 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT -ch…
8 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,+fp64-denormals < %s | FileCheck -check…
9 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,-fp64-denormals < %s | FileCheck -check…
10 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals,+fp64-denormals < %s | FileCheck -check…
11 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals,-fp64-denormals < %s | FileCheck -check…
13 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals < %s | FileCheck -check-prefix=DEFAULT …
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| D | llvm.AMDGPU.rcp.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machineinst…
2 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -ch…
3 ; XUN: llc -march=amdgcn -mcpu=SI -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck -ch…
4 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -enable-unsafe-fp-math -verify-machinei…
5 ; RUN: llc -march=amdgcn -mcpu=tonga -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck …
6 ; XUN: llc -march=amdgcn -mcpu=tonga -mattr=+fp32-denormals -verify-machineinstrs < %s | FileCheck …
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| D | rsq.ll | 1 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs -enable-unsafe-fp-ma…
2 ; RUN: llc -march=amdgcn -mcpu=SI -mattr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -ch…
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| D | mad-combine.ll | 8 ; RUN: llc -march=amdgcn -mcpu=tahiti -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstr…
9 ; RUN: llc -march=amdgcn -mcpu=verde -mattr=+fp32-denormals -fp-contract=fast -verify-machineinstrs…
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| /external/deqp/modules/gles2/accuracy/ |
| D | es2aVaryingInterpolationTests.cpp | 134 tcu::Float32 fp32(val); in isValidFloat() local
135 return !fp32.isDenorm() && !fp32.isInf() && !fp32.isNaN(); in isValidFloat()
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| /external/deqp/modules/gles3/accuracy/ |
| D | es3aVaryingInterpolationTests.cpp | 137 tcu::Float32 fp32(val); in isValidFloat() local
138 return !fp32.isDenorm() && !fp32.isInf() && !fp32.isNaN(); in isValidFloat()
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| /external/v8/build/ |
| D | standalone.gypi | 133 # Possible values fp32, fp64, fpxx.
134 # fp32 - 32 32-bit FPU registers are available, doubles are placed in
137 # fpxx - compatibility mode, it chooses fp32 or fp64 depending on runtime
139 'mips_fpu_mode%': 'fp32',
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| D | toolchain.gypi | 330 ['mips_fpu_mode=="fp32"', {
383 ['mips_fpu_mode=="fp32"', {
434 ['mips_fpu_mode=="fp32"', {
514 ['mips_fpu_mode=="fp32"', {
572 ['mips_fpu_mode=="fp32"', {
629 ['mips_fpu_mode=="fp32"', {
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPU.td | 58 // fp32 denormals also causes instructions to run at the double
60 def FeatureFP32Denormals : SubtargetFeature<"fp32-denormals",
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