Home
last modified time | relevance | path

Searched refs:frecps (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-frsqrt-frecp.s19 frecps v31.4s, v29.4s, v28.4s
20 frecps v3.2s, v8.2s, v12.2s
21 frecps v17.2d, v15.2d, v13.2d
Dneon-scalar-recip.s9 frecps s21, s16, s13
10 frecps d22, d30, d21
Dneon-diagnostics.s382 frecps v0.4s, v1.2d, v2.4s
383 frecps v0.8h, v1.8h, v2.8h
3889 frecps s21, s16, h13
3890 frecps d22, s30, d21
Darm64-advsimd.s331 frecps.2s v0, v0, v0
402 ; CHECK: frecps.2s v0, v0, v0 ; encoding: [0x00,0xfc,0x20,0x0e]
/external/llvm/test/CodeGen/AArch64/
Darm64-vsqrt.ll5 ;CHECK: frecps.2s
8 %tmp3 = call <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
14 ;CHECK: frecps.4s
17 %tmp3 = call <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
23 ;CHECK: frecps.2d
26 %tmp3 = call <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double> %tmp1, <2 x double> %tmp2)
30 declare <2 x float> @llvm.aarch64.neon.frecps.v2f32(<2 x float>, <2 x float>) nounwind readnone
31 declare <4 x float> @llvm.aarch64.neon.frecps.v4f32(<4 x float>, <4 x float>) nounwind readnone
32 declare <2 x double> @llvm.aarch64.neon.frecps.v2f64(<2 x double>, <2 x double>) nounwind readnone
/external/vixl/src/vixl/a64/
Dsimulator-a64.h2351 LogicVRegister frecps(VectorFormat vform,
2355 LogicVRegister frecps(VectorFormat vform,
Dlogic-a64.cc3910 LogicVRegister Simulator::frecps(VectorFormat vform, in frecps() function in vixl::Simulator
3925 LogicVRegister Simulator::frecps(VectorFormat vform, in frecps() function in vixl::Simulator
3930 frecps<float>(vform, dst, src1, src2); in frecps()
3933 frecps<double>(vform, dst, src1, src2); in frecps()
Dsimulator-a64.cc2663 case NEON_FRECPS: frecps(vf, rd, rn, rm); break; in VisitNEON3Same()
3559 case NEON_FRECPS_scalar: frecps(vf, rd, rn, rm); break; in VisitNEONScalar3Same()
Dmacro-assembler-a64.h2112 V(frecps, Frecps) \
Dassembler-a64.h3296 void frecps(const VRegister& vd,
Dassembler-a64.cc3245 V(frecps, NEON_FRECPS, NEON_FRECPS_scalar) \
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt177 # CHECK: frecps v5.4s, v7.4s, v16.4s
1499 # CHECK: frecps s21, s16, s13
1500 # CHECK: frecps d22, d30, d21
Darm64-advsimd.txt314 # CHECK: frecps.2s v0, v0, v0
/external/vixl/test/
Dtest-simulator-a64.cc3731 DEFINE_TEST_NEON_3SAME_FP(frecps, Basic)
3795 DEFINE_TEST_NEON_3SAME_FP_SCALAR(frecps, Basic)
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp26625 frecps d2, d11, d29 3b81dae5b59bb8f0734fc5eacdb8df2a ccf43d40a85e3ed67caf5c2a2cb8c07a ea149ae99…
26626 frecps s2, s11, s29 102e3df61e1737b64773108a9a8cc505 1439d55511d528139f846ceb1c09a913 20aef836e…
26627 frecps v2.2d, v11.2d, v29.2d b37f5e362b59c6b62e7496a900ce685c c15051965460e8aaaba51c691b555486 …
26628 frecps v2.4s, v11.4s, v29.4s 2709a118a1b48a25ac673a3b43536de3 d4cf15783553a2cd242651986d736786 …
26629 frecps v2.2s, v11.2s, v29.2s 70616910427da6374460e135a7ee774e 5449856d78007bb08e1bef6c563485c8 …
/external/vixl/doc/
Dsupported-instructions.md2354 void frecps(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2751 defm FRECPS : SIMDThreeSameVectorFP<0,0,0b11111,"frecps", int_aarch64_neon_frecps>;
2998 defm FRECPS : SIMDThreeScalarSD<0, 0, 0b11111, "frecps", int_aarch64_neon_frecps>;