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Searched refs:getCondCode (Results 1 – 9 of 9) sorted by relevance

/external/llvm/lib/Target/R600/
DR600ISelLowering.cpp1085 DAG.getCondCode(ISD::SETNE) in LowerFPTOUINT()
1154 CC = DAG.getCondCode(InverseCC); in LowerSELECT_CC()
1160 CC = DAG.getCondCode(SwapInvCC); in LowerSELECT_CC()
1188 CC = DAG.getCondCode(CCSwapped); in LowerSELECT_CC()
1196 CC = DAG.getCondCode(CCSwapped); in LowerSELECT_CC()
1228 DAG.getCondCode(CCOpcode)); in LowerSELECT_CC()
1254 DAG.getCondCode(ISD::SETNE)); in LowerSELECT_CC()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeFloatTypes.cpp764 DAG.getCondCode(CCCode), NewLHS, NewRHS, in SoftenFloatOp_BR_CC()
804 DAG.getCondCode(CCCode)), in SoftenFloatOp_SELECT_CC()
826 DAG.getCondCode(CCCode)), in SoftenFloatOp_SETCC()
1445 DAG.getCondCode(CCCode), NewLHS, NewRHS, in ExpandFloatOp_BR_CC()
1539 DAG.getCondCode(CCCode)), 0); in ExpandFloatOp_SELECT_CC()
1556 DAG.getCondCode(CCCode)), 0); in ExpandFloatOp_SETCC()
DLegalizeIntegerTypes.cpp2632 LHSHi, RHSHi, DAG.getCondCode(CCCode)); in IntegerExpandSetCCOperands()
2676 DAG.getCondCode(CCCode), NewLHS, NewRHS, in ExpandIntOp_BR_CC()
2695 DAG.getCondCode(CCCode)), 0); in ExpandIntOp_SELECT_CC()
2712 DAG.getCondCode(CCCode)), 0); in ExpandIntOp_SETCC()
DLegalizeDAG.cpp1691 CC = DAG.getCondCode(InvCC); in LegalizeSetCCCondCode()
1742 CC = DAG.getCondCode(InvCC); in LegalizeSetCCCondCode()
3830 DAG.getCondCode(ISD::SETNE), Tmp3, in ExpandNode()
3942 CC = DAG.getCondCode(ISD::SETNE); in ExpandNode()
3973 Tmp4 = DAG.getCondCode(ISD::SETNE); in ExpandNode()
DTargetLowering.cpp211 NewLHS, NewRHS, DAG.getCondCode(CCCode)); in softenSetCCOperands()
216 NewRHS, DAG.getCondCode(getCmpLibcallCC(LC2))); in softenSetCCOperands()
DSelectionDAG.cpp1447 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) { in getCondCode() function in SelectionDAG
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h545 SDValue getCondCode(ISD::CondCode Cond);
711 return getNode(ISD::SETCC, DL, VT, LHS, RHS, getCondCode(Cond));
732 LHS, RHS, True, False, getCondCode(Cond));
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp339 AArch64CC::CondCode getCondCode() const { in getCondCode() function in __anon26fd99540211::AArch64Operand
1212 Inst.addOperand(MCOperand::CreateImm(getCondCode())); in addCondCodeOperands()
1703 OS << "<condcode " << getCondCode() << ">"; in print()
/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp660 ARMCC::CondCodes getCondCode() const { in getCondCode() function in __anonef5d38c20311::ARMOperand
1762 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addCondCodeOperands()
1763 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR; in addCondCodeOperands()
1789 Inst.addOperand(MCOperand::CreateImm(unsigned(getCondCode()))); in addITCondCodeOperands()
2844 OS << "<ARMCC::" << ARMCondCodeToString(getCondCode()) << ">"; in print()
4735 unsigned Cond = static_cast<ARMOperand &>(*Operands[CondOp]).getCondCode(); in cvtThumbBranches()