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Searched refs:getConstantOperandVal (Results 1 – 17 of 17) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp867 unsigned RotAmt = V.getConstantOperandVal(1); in getValueBits()
880 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits()
896 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits()
912 uint64_t Mask = V.getConstantOperandVal(1); in getValueBits()
2909 int Elt = N->getConstantOperandVal(0); in Select()
2910 int EltSize = N->getConstantOperandVal(1); in Select()
3015 uint64_t PM = O.getConstantOperandVal(2); in combineToCMPB()
3016 uint64_t PAlt = O.getConstantOperandVal(3); in combineToCMPB()
3029 O.getConstantOperandVal(1) != 0) { in combineToCMPB()
3043 if (Op0.getConstantOperandVal(1) != Bits-8) in combineToCMPB()
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/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp526 if (N->getConstantOperandVal(1)) in PreprocessISelDAG()
797 int ScaleLog = 8 - Shift.getConstantOperandVal(1); in FoldMaskAndShiftToExtract()
846 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in FoldMaskedShiftToScaledMask()
906 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in FoldMaskAndShiftToScale()
1095 uint64_t Mask = And.getConstantOperandVal(1) >> N.getConstantOperandVal(1); in MatchAddressRecursively()
1276 uint64_t Mask = N.getConstantOperandVal(1); in MatchAddressRecursively()
DX86ISelLowering.cpp4701 Offset = Ptr.getConstantOperandVal(1); in LowerAsSplatVectorLoad()
12601 unsigned ShAmt = Op->getConstantOperandVal(1); in EmitTest()
13334 X86::CondCode CCode = (X86::CondCode)Op0.getConstantOperandVal(0); in LowerSETCC()
14140 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0); in LowerBRCOND()
14158 (X86::CondCode)Cond.getOperand(1).getConstantOperandVal(0); in LowerBRCOND()
14171 (X86::CondCode)Cond.getOperand(0).getConstantOperandVal(0); in LowerBRCOND()
14448 unsigned Align = Op.getConstantOperandVal(3); in LowerVAARG()
21387 assert(X86::CondCode(SetCC.getConstantOperandVal(0)) == X86::COND_B && in checkBoolTestSetCCCombine()
21392 CC = X86::CondCode(SetCC.getConstantOperandVal(0)); in checkBoolTestSetCCCombine()
21430 CC = X86::CondCode(SetCC.getConstantOperandVal(2)); in checkBoolTestSetCCCombine()
[all …]
/external/llvm/include/llvm/CodeGen/
DSelectionDAGNodes.h166 inline uint64_t getConstantOperandVal(unsigned i) const;
570 uint64_t getConstantOperandVal(unsigned Num) const;
880 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const {
881 return Node->getConstantOperandVal(i);
/external/llvm/lib/Target/R600/
DSIISelLowering.cpp750 assert(SetCC->getConstantOperandVal(1) == 1); in LowerBRCOND()
1828 unsigned OldDmask = Node->getConstantOperandVal(0); in adjustWritemask()
1844 Lane = SubIdx2Lane(I->getConstantOperandVal(1)); in adjustWritemask()
/external/llvm/lib/CodeGen/SelectionDAG/
DLegalizeTypesGeneric.cpp299 const unsigned Align = N->getConstantOperandVal(3); in ExpandRes_VAARG()
DInstrEmitter.cpp759 CC = Node->getConstantOperandVal(PatchPointOpers::CCPos); in EmitMachineNode()
DSelectionDAG.cpp3008 Operand.getConstantOperandVal(1) == 0 && in getNode()
6563 uint64_t SDNode::getConstantOperandVal(unsigned Num) const { in getConstantOperandVal() function in SDNode
6721 FrameOffset = Ptr.getConstantOperandVal(1); in InferPtrAlignment()
DLegalizeDAG.cpp3073 unsigned Align = Node->getConstantOperandVal(3); in ExpandNode()
4104 Node->getConstantOperandVal(3)); in PromoteNode()
DLegalizeFloatTypes.cpp628 N->getConstantOperandVal(3)); in SoftenFloatRes_VAARG()
DDAGCombiner.cpp8114 const bool NIsTrunc = N->getConstantOperandVal(1) == 1; in visitFP_ROUND()
8115 const bool N0IsTrunc = N0.getNode()->getConstantOperandVal(1) == 1; in visitFP_ROUND()
8174 && N0.getNode()->getConstantOperandVal(1) == 1) { in visitFP_EXTEND()
11738 unsigned Idx = N->getConstantOperandVal(1); in visitEXTRACT_SUBVECTOR()
DLegalizeIntegerTypes.cpp782 N->getConstantOperandVal(3)); in PromoteIntRes_VAARG()
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp1402 return DAG.getConstant(Op->getConstantOperandVal(ImmOp), Op->getValueType(0)); in lowerMSASplatImm()
1579 Op->getConstantOperandVal(3)); in lowerINTRINSIC_WO_CHAIN()
1592 Op->getConstantOperandVal(3)); in lowerINTRINSIC_WO_CHAIN()
DMipsISelLowering.cpp1819 unsigned Align = Node->getConstantOperandVal(3); in lowerVAARG()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp3293 isPowerOf2_64(LHS.getConstantOperandVal(1))) { in LowerBR_CC()
3295 uint64_t Mask = LHS.getConstantOperandVal(1); in LowerBR_CC()
3308 isPowerOf2_64(LHS.getConstantOperandVal(1))) { in LowerBR_CC()
3310 uint64_t Mask = LHS.getConstantOperandVal(1); in LowerBR_CC()
4003 unsigned Align = Op.getConstantOperandVal(3); in LowerVAARG()
6852 uint64_t TruncMask = N->getConstantOperandVal(1); in isDesirableToCommuteWithShift()
7123 ShiftAmount = N->getConstantOperandVal(1); in findEXTRHalf()
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp2475 uint64_t depth = Op.getConstantOperandVal(0); in LowerFRAMEADDR()
2493 uint64_t depth = Op.getConstantOperandVal(0); in LowerRETURNADDR()
/external/llvm/lib/Target/ARM/
DARMISelDAGToDAG.cpp1001 MemN->getConstantOperandVal(MemN->getNumOperands() - 1) == 1)) { in SelectAddrMode6()