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Searched refs:getNOT (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp1983 N0 = DAG.getNOT(dl, Temp, MVT::i1); in SimplifySetCC()
1992 Temp = DAG.getNOT(dl, N0, MVT::i1); in SimplifySetCC()
1999 Temp = DAG.getNOT(dl, N1, MVT::i1); in SimplifySetCC()
2006 Temp = DAG.getNOT(dl, N0, MVT::i1); in SimplifySetCC()
2013 Temp = DAG.getNOT(dl, N1, MVT::i1); in SimplifySetCC()
DLegalizeDAG.cpp2804 Op = DAG.getNOT(dl, Op, VT); in ExpandBitCount()
2817 DAG.getNOT(dl, Op, VT), in ExpandBitCount()
3964 Tmp4 = DAG.getNOT(dl, Tmp4, Tmp4->getValueType(0)); in ExpandNode()
DDAGCombiner.cpp3966 SDValue NotX = DAG.getNOT(SDLoc(X), X, VT); in visitXOR()
4799 SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT); in visitSELECT()
4805 SDValue NOTNode = DAG.getNOT(SDLoc(N0), N0, VT); in visitSELECT()
12902 SDValue NotN0 = DAG.getNOT(SDLoc(N0), N0, XType); in SimplifySelectCC()
DSelectionDAG.cpp1068 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) { in getNOT() function in SelectionDAG
/external/llvm/lib/Target/Mips/
DMipsSEISelLowering.cpp1491 DAG.getNOT(DL, Bit, ResTy)); in lowerMSABitClear()
2031 return DAG.getNOT(DL, Res, Res->getValueType(0)); in lowerINTRINSIC_WO_CHAIN()
2037 return DAG.getNOT(DL, Res, Res->getValueType(0)); in lowerINTRINSIC_WO_CHAIN()
/external/llvm/include/llvm/CodeGen/
DSelectionDAG.h611 SDValue getNOT(SDLoc DL, SDValue Val, EVT VT);
/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp1978 SDValue Not = DAG.getNOT(SL, Shr, MVT::i64); in LowerFTRUNC()
2086 K = DAG.getNode(ISD::AND, SL, MVT::i64, K, DAG.getNOT(SL, M, MVT::i64)); in LowerFROUND64()
/external/llvm/lib/Target/X86/
DX86ISelLowering.cpp13241 Result = DAG.getNOT(dl, Result, MVT::v4i32); in LowerVSETCC()
13264 Result = DAG.getNOT(dl, Result, MVT::v4i32); in LowerVSETCC()
13283 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()
13522 Res = DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
13630 return DAG.getNOT(DL, Res, Res.getValueType()); in LowerSELECT()
23427 return DAG.getNOT(DL, LHS.getOperand(0), VT); in PerformISDSETCCCombine()
/external/llvm/lib/Target/AArch64/
DAArch64ISelLowering.cpp6428 return Cmp = DAG.getNOT(dl, Cmp, Cmp.getValueType()); in LowerVSETCC()
/external/llvm/lib/Target/ARM/
DARMISelLowering.cpp4475 Result = DAG.getNOT(dl, Result, VT); in LowerVSETCC()