Searched refs:getShiftValue (Results 1 – 7 of 7) sorted by relevance
650 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 && in mergePreIdxUpdateInsn()693 assert(AArch64_AM::getShiftValue(Update->getOperand(3).getImm()) == 0 && in mergePostIdxUpdateInsn()738 if (AArch64_AM::getShiftValue(MI->getOperand(3).getImm())) in isMatchingUpdateInsn()
520 Add.addOperand(MCOperand::CreateImm(AArch64_AM::getShiftValue(0))); in EmitInstruction()
1703 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg()1711 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg()
279 unsigned ShiftVal = AArch64_AM::getShiftValue(MO1.getImm()); in getAddSubImmOpValue()565 unsigned ShiftVal = AArch64_AM::getShiftValue(MO.getImm()); in getMoveVecShifterOpValue()
85 static inline unsigned getShiftValue(unsigned Imm) { in getShiftValue() function
948 AArch64_AM::getShiftValue(MI->getOperand(OpNum + 1).getImm()); in printAddSubImm()984 AArch64_AM::getShiftValue(Val) == 0) in printShifter()987 << " #" << AArch64_AM::getShiftValue(Val); in printShifter()
1699 OS << ", lsl #" << AArch64_AM::getShiftValue(Shift) << ">"; in print()