| /external/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 1761 return CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, NVT, in getAtomicLoadArithTargetConstant()
2400 CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result)); in Select()
2408 CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result)); in Select()
2593 CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, MVT::i8, Result); in Select()
2662 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit, dl, in Select()
2697 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_8bit_hi, dl, in Select()
2721 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_16bit, dl, in Select()
2743 SDValue Subreg = CurDAG->getTargetExtractSubreg(X86::sub_32bit, dl, in Select()
|
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.cpp | 2068 return DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, MVT::v2i16, in LowerBUILD_VECTOR()
2228 N = DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, in LowerEXTRACT_VECTOR()
2231 N = DAG.getTargetExtractSubreg(Hexagon::subreg_hireg, dl, in LowerEXTRACT_VECTOR()
2239 N = DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, in LowerEXTRACT_VECTOR()
2242 N = DAG.getTargetExtractSubreg(Hexagon::subreg_hireg, dl, in LowerEXTRACT_VECTOR()
2250 N = DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, in LowerEXTRACT_VECTOR()
2253 N = DAG.getTargetExtractSubreg(Hexagon::subreg_hireg, dl, in LowerEXTRACT_VECTOR()
2262 N = DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, MVT::i32, N); in LowerEXTRACT_VECTOR()
2283 N = DAG.getTargetExtractSubreg(Hexagon::subreg_loreg, dl, MVT::i32, N); in LowerEXTRACT_VECTOR()
|
| D | HexagonISelDAGToDAG.cpp | 498 Value = CurDAG->getTargetExtractSubreg(Hexagon::subreg_loreg, in SelectIndexedStore()
1187 SDValue SubregHI = CurDAG->getTargetExtractSubreg(Hexagon::subreg_hireg, dl, in SelectBitOp()
1190 SDValue SubregLO = CurDAG->getTargetExtractSubreg(Hexagon::subreg_loreg, dl, in SelectBitOp()
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelDAGToDAG.cpp | 1071 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectLoad()
1102 CurDAG->getTargetExtractSubreg(SubRegIdx + i, dl, VT, SuperReg)); in SelectPostLoad()
1177 return DAG.getTargetExtractSubreg(AArch64::dsub, SDLoc(V128Reg), NarrowTy, in NarrowVector()
1210 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg); in SelectLoadLane()
1262 SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, in SelectPostLoadLane()
2182 SDValue Extract = CurDAG->getTargetExtractSubreg(SubReg, SDLoc(Node), VT, in Select()
|
| D | AArch64ISelLowering.cpp | 3433 return DAG.getTargetExtractSubreg(AArch64::ssub, DL, VT, Sel); in LowerFCOPYSIGN()
3435 return DAG.getTargetExtractSubreg(AArch64::dsub, DL, VT, Sel); in LowerFCOPYSIGN()
4522 return DAG.getTargetExtractSubreg(AArch64::dsub, DL, NarrowTy, V128Reg); in NarrowVector()
6132 return DAG.getTargetExtractSubreg(AArch64::bsub, dl, Op.getValueType(), in LowerEXTRACT_SUBVECTOR()
6135 return DAG.getTargetExtractSubreg(AArch64::hsub, dl, Op.getValueType(), in LowerEXTRACT_SUBVECTOR()
6138 return DAG.getTargetExtractSubreg(AArch64::ssub, dl, Op.getValueType(), in LowerEXTRACT_SUBVECTOR()
6141 return DAG.getTargetExtractSubreg(AArch64::dsub, dl, Op.getValueType(), in LowerEXTRACT_SUBVECTOR()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1898 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLD()
2164 CurDAG->getTargetExtractSubreg(Sub0 + Vec, dl, VT, SuperReg)); in SelectVLDSTLane()
2247 CurDAG->getTargetExtractSubreg(SubIdx+Vec, dl, VT, SuperReg)); in SelectVLDDup()
3408 SDValue Sub0 = CurDAG->getTargetExtractSubreg(ARM::gsub_0, dl, MVT::i32, in SelectInlineAsm()
3410 SDValue Sub1 = CurDAG->getTargetExtractSubreg(ARM::gsub_1, dl, MVT::i32, in SelectInlineAsm()
|
| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.cpp | 2529 SDValue Hi32 = DAG.getTargetExtractSubreg(SP::sub_even, dl, MVT::f32, in LowerF64Op()
2531 SDValue Lo32 = DAG.getTargetExtractSubreg(SP::sub_odd, dl, MVT::f32, in LowerF64Op()
2654 SDValue Hi64 = DAG.getTargetExtractSubreg(SP::sub_even64, dl, MVT::f64, in LowerFNEGorFABS()
2656 SDValue Lo64 = DAG.getTargetExtractSubreg(SP::sub_odd64, dl, MVT::f64, in LowerFNEGorFABS()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 861 return CurDAG->getTargetExtractSubreg(SystemZ::subreg_l32, DL, VT, N); in convertTo()
|
| D | SystemZISelLowering.cpp | 1780 Even = DAG.getTargetExtractSubreg(SystemZ::even128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
1781 Odd = DAG.getTargetExtractSubreg(SystemZ::odd128(Is32Bit), DL, VT, Result); in lowerGR128Binary()
2159 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, in lowerBITCAST()
2168 return DAG.getTargetExtractSubreg(SystemZ::subreg_h32, DL, in lowerBITCAST()
|
| /external/llvm/lib/Target/R600/ |
| D | SIISelLowering.cpp | 2045 SDValue PtrLo = DAG.getTargetExtractSubreg(AMDGPU::sub0, DL, MVT::i32, Ptr); in buildRSRC()
2046 SDValue PtrHi = DAG.getTargetExtractSubreg(AMDGPU::sub1, DL, MVT::i32, Ptr); in buildRSRC()
|
| D | R600ISelLowering.cpp | 659 return DAG.getTargetExtractSubreg( in LowerOperation()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | SelectionDAG.h | 964 SDValue getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2691 SDValue CCBit = CurDAG->getTargetExtractSubreg(SRI, dl, MVT::i1, CCReg); in Select()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAG.cpp | 5869 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, in getTargetExtractSubreg() function in SelectionDAG
|