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Searched refs:i4 (Results 1 – 25 of 181) sorted by relevance

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/external/llvm/test/Transforms/Reassociate/
Drepeats.ll90 define i4 @foo4x8(i4 %x) {
96 %tmp1 = mul i4 %x, %x
97 %tmp2 = mul i4 %tmp1, %x
98 %tmp3 = mul i4 %tmp2, %x
99 %tmp4 = mul i4 %tmp3, %x
100 %tmp5 = mul i4 %tmp4, %x
101 %tmp6 = mul i4 %tmp5, %x
102 %tmp7 = mul i4 %tmp6, %x
103 ret i4 %tmp7
106 define i4 @foo4x9(i4 %x) {
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/external/llvm/test/Analysis/ScalarEvolution/
Dtrip-count9.ll14 define void @foo(i4 %n) {
16 %s = icmp sgt i4 %n, 0
19 %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
20 %i.next = add i4 %i, 1
21 %t = icmp slt i4 %i.next, %n
30 define void @step2(i4 %n) {
32 %s = icmp sgt i4 %n, 0
35 %i = phi i4 [ 0, %entry ], [ %i.next, %loop ]
36 %i.next = add i4 %i, 2
37 %t = icmp slt i4 %i.next, %n
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/external/llvm/test/CodeGen/PowerPC/
Dvec_splat.ll10 %i4 = type <4 x i32>
23 define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) nounwind {
24 %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
25 %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
26 %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
27 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
28 %q = load %i4, %i4* %Q ; <%i4> [#uses=1]
29 %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
30 store %i4 %R, %i4* %P
34 define void @splat_imm_i32(%i4* %P, %i4* %Q, i32 %X) nounwind {
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Dvector.ll10 %i4 = type <4 x i32>
125 define void @test_cast_1(%f4* %b, %i4* %a) {
129 %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1]
130 %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 >
131 store %i4 %tmp4, %i4* %a
156 define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
157 %tmp = insertelement %i4 undef, i32 %X, i32 0
158 %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1
159 %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2
160 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3
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Dcr-spills.ll38 %cmp.i4.i1427 = icmp slt i32 undef, undef
79 %cmp.i4.i1515 = icmp slt i32 %cond.i.i1514, %1
80 %cond.i5.i1516 = select i1 %cmp.i4.i1515, i32 %cond.i.i1514, i32 %1
98 %cmp.i4.i1507 = icmp slt i32 %cond.i.i1506, %1
99 %cond.i5.i1508 = select i1 %cmp.i4.i1507, i32 %cond.i.i1506, i32 %1
107 %cmp.i4.i1503 = icmp slt i32 %cond.i.i1502, %1
108 %cond.i5.i1504 = select i1 %cmp.i4.i1503, i32 %cond.i.i1502, i32 %1
126 %cmp.i4.i1499 = icmp slt i32 %cond.i.i1498, %1
127 %cond.i5.i1500 = select i1 %cmp.i4.i1499, i32 %cond.i.i1498, i32 %1
145 %cmp.i4.i1495 = icmp slt i32 %cond.i.i1494, %1
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/external/llvm/test/CodeGen/Hexagon/vect/
Dvect-splat.ll5 %i4 = type <4 x i32>
7 define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
8 %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
9 %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
10 %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
11 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
12 %q = load %i4, %i4* %Q ; <%i4> [#uses=1]
13 %R = add %i4 %q, %tmp6 ; <%i4> [#uses=1]
14 store %i4 %R, %i4* %P
/external/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/istreambuf.iterator_op==/
Dequal.pass.cpp30 std::istreambuf_iterator<char> i4; in main() local
35 assert(!(i1 == i4)); in main()
40 assert(!(i2 == i4)); in main()
45 assert( (i3 == i4)); in main()
47 assert(!(i4 == i1)); in main()
48 assert(!(i4 == i2)); in main()
49 assert( (i4 == i3)); in main()
50 assert( (i4 == i4)); in main()
58 std::istreambuf_iterator<wchar_t> i4; in main() local
63 assert(!(i1 == i4)); in main()
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/external/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/istreambuf.iterator_op!=/
Dnot_equal.pass.cpp30 std::istreambuf_iterator<char> i4; in main() local
35 assert( (i1 != i4)); in main()
40 assert( (i2 != i4)); in main()
45 assert(!(i3 != i4)); in main()
47 assert( (i4 != i1)); in main()
48 assert( (i4 != i2)); in main()
49 assert(!(i4 != i3)); in main()
50 assert(!(i4 != i4)); in main()
58 std::istreambuf_iterator<wchar_t> i4; in main() local
63 assert( (i1 != i4)); in main()
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/external/valgrind/none/tests/s390x/
Drxsbg.c4 #define DO_RXSBG(insn, _r1, _r2, i3, i4, i5) \ argument
9 asm volatile( insn(1,2, i3, i4, i5) \
15 …printf(#insn " r1(==%16.16lX),r2(==%16.16lX),0x" #i3 ",0x" #i4 ",0x" #i5 " = %16.16lX (cc=%d)\n", …
18 #define r1sweep(i, r2, i3, i4, i5) \ argument
20 DO_RXSBG(i, 000000000000000000ul, r2, i3, i4, i5); \
21 DO_RXSBG(i, 0x0000ffffccccaaaaul, r2, i3, i4, i5); \
22 DO_RXSBG(i, 0xfffffffffffffffful, r2, i3, i4, i5); \
25 #define r2sweep(i, i3, i4, i5) \ argument
27 r1sweep(i, 0x0000000000000000ul, i3, i4, i5); \
28 r1sweep(i, 0x5555ccccffff0000ul, i3, i4, i5); \
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Dopcodes.h44 #define RIE_RUPI(op1,r1,m3,i4,i2,op2) \ argument
46 ".long 0x" #i4 #i2 #op2 "\n\t"
50 #define RIE_RRPU(op1,r1,r2,i4,m3,u0,op2) \ argument
52 ".long 0x" #i4 #m3 #u0 #op2 "\n\t"
62 #define RIE_RUPU(op1,r1,m3,i4,i2,op2) \ argument
64 ".long 0x" #i4 #i2 #op2 "\n\t"
98 #define RIE_RRUUU(op1,r1,r2,i3,i4,i5,op2) \ argument
100 ".long 0x" #i3 #i4 #i5 #op2 "\n\t"
162 #define CGIJ(r1,m3,i4,i2) RIE_RUPI(ec,r1,m3,i4,i2,7c) argument
164 #define CGRJ(r1,r2,i4,m3) RIE_RRPU(ec,r1,r2,i4,m3,0,64) argument
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/external/libcxx/test/std/iterators/stream.iterators/istreambuf.iterator/istreambuf.iterator_equal/
Dequal.pass.cpp28 std::istreambuf_iterator<char> i4; in main() local
33 assert(!i1.equal(i4)); in main()
38 assert(!i2.equal(i4)); in main()
43 assert( i3.equal(i4)); in main()
45 assert(!i4.equal(i1)); in main()
46 assert(!i4.equal(i2)); in main()
47 assert( i4.equal(i3)); in main()
48 assert( i4.equal(i4)); in main()
56 std::istreambuf_iterator<wchar_t> i4; in main() local
61 assert(!i1.equal(i4)); in main()
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/external/llvm/test/CodeGen/X86/
Dvector.ll10 %i4 = type <4 x i32>
116 define void @test_cast_1(%f4* %b, %i4* %a) {
119 %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1]
120 %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 > ; <%i4> [#uses=1]
121 store %i4 %tmp4, %i4* %a
146 define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
147 %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
148 %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
149 %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
150 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
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D2009-11-25-ImpDefBug.ll41 bb.i4: ; preds = %bb.i4.bbcl.disp, %bb1.i.fragment.bbcl.…
58 br i1 undef, label %meshBB81.bbcl.disp, label %bb.i4.bbcl.disp
60 meshBB85: ; preds = %meshBB81.bbcl.disp, %bb.i4.bbcl.disp, …
77 switch i8 undef, label %bb.i4 [
80 i8 35, label %bb.i4.cl
97 bb.i4.cl: ; preds = %bb.i4.bbcl.disp, %bb1.i.fragment.bbcl.…
100 bb.i4.bbcl.disp: ; preds = %meshBB81.cl141, %meshBB81.cl, %meshBB81
101 switch i8 undef, label %bb.i4 [
102 i8 35, label %bb.i4.cl
107 br i1 undef, label %meshBB81.bbcl.disp, label %bb.i4.bbcl.disp
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/external/llvm/test/CodeGen/Generic/
Dvector.ll9 %i4 = type <4 x i32>
115 define void @test_cast_1(%f4* %b, %i4* %a) {
118 %tmp3 = bitcast %f4 %tmp2 to %i4 ; <%i4> [#uses=1]
119 %tmp4 = add %i4 %tmp3, < i32 1, i32 2, i32 3, i32 4 > ; <%i4> [#uses=1]
120 store %i4 %tmp4, %i4* %a
144 define void @splat_i4(%i4* %P, %i4* %Q, i32 %X) {
145 %tmp = insertelement %i4 undef, i32 %X, i32 0 ; <%i4> [#uses=1]
146 %tmp2 = insertelement %i4 %tmp, i32 %X, i32 1 ; <%i4> [#uses=1]
147 %tmp4 = insertelement %i4 %tmp2, i32 %X, i32 2 ; <%i4> [#uses=1]
148 %tmp6 = insertelement %i4 %tmp4, i32 %X, i32 3 ; <%i4> [#uses=1]
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/external/v8/test/mjsunit/compiler/
Dregress-177883.js55 var i3 = 0, i4 = 0;
58 i4 = +__ZNK4Math5plane3dotERKNS_6float4E(i1 + 16 | 0, i3) > 0.0 ? i2 | 2 : i2;
59 i2 = +__ZNK4Math5plane3dotERKNS_6float4E(i1 + 32 | 0, i3) > 0.0 ? i4 | 4 : i4;
60 i4 = +__ZNK4Math5plane3dotERKNS_6float4E(i1 + 48 | 0, i3) > 0.0 ? i2 | 8 : i2;
61 i2 = +__ZNK4Math5plane3dotERKNS_6float4E(i1 + 64 | 0, i3) > 0.0 ? i4 | 16 : i4;
68 …var i3 = 0, i4 = 0, i5 = 0, i6 = 0, i7 = 0, i8 = 0, i9 = 0, i10 = 0, i11 = 0, i12 = 0, i13 = 0, i1…
71 i4 = i3 | 0;
72 i5 = i4 | 0;
74 i6 = i4 + 4 | 0;
76 i7 = i4 + 8 | 0;
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/external/libcxx/test/std/iterators/stream.iterators/istream.iterator/istream.iterator.ops/
Dequal.pass.cpp33 std::istream_iterator<int> i4; in main() local
38 assert(i1 != i4); in main()
43 assert(i2 != i4); in main()
47 assert(i3 != i4); in main()
50 assert(i4 == i4); in main()
51 assert(i4 == i5); in main()
/external/llvm/test/Analysis/CostModel/X86/
Dscalarize.ll8 %i4 = type <4 x i32>
13 declare %i4 @llvm.bswap.v4i32(%i4)
16 declare %i4 @llvm.ctpop.v4i32(%i4)
26 %r2 = call %i4 @llvm.bswap.v4i32(%i4 undef)
33 %r4 = call %i4 @llvm.ctpop.v4i32(%i4 undef)
/external/clang/test/CodeGen/
Darm64-arguments.c297 int f38_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f38_stack() argument
308 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f38_stack()
350 int f39_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f39_stack() argument
361 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f39_stack()
405 int f40_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f40_stack() argument
416 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f40_stack()
460 int f41_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f41_stack() argument
471 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f41_stack()
517 int f42_stack(int i, int i2, int i3, int i4, int i5, int i6, int i7, int i8, in f42_stack() argument
524 return s1.i + s2.i + i + i2 + i3 + i4 + i5 + i6 + i7 + i8 + i9 + s1.s + s2.s; in f42_stack()
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/external/google-breakpad/src/processor/
Dstackwalker_selftest_sol.s87 mov %i7, %i4
88 inccc 8, %i4
89 mov %i4, %i0
96 mov %fp, %i4
97 mov %i4, %i0
/external/llvm/test/Transforms/SLPVectorizer/X86/
Dsimplebb.ll18 %i4 = load double, double* %arrayidx4, align 8
19 %mul5 = fmul double %i3, %i4
38 %i4 = load double, double* %arrayidx4, align 8
39 %mul5 = fmul double %i3, %i4
61 %i4 = load double, double* %arrayidx4, align 8
62 %mul5 = fmul double %i3, %i4
81 %i4 = load double, double* %arrayidx4, align 8
82 %mul5 = fmul double %i3, %i4
Dcall.ll25 %i4 = load double, double* %arrayidx4, align 8
26 %mul5 = fmul double %i3, %i4
46 %i4 = load double, double* %arrayidx4, align 8
47 %mul5 = fmul double %i3, %i4
67 %i4 = load double, double* %arrayidx4, align 8
68 %mul5 = fmul double %i3, %i4
89 %i4 = load double, double* %arrayidx4, align 8
90 %mul5 = fmul double %i3, %i4
112 %i4 = load i64, i64* %arrayidx4, align 8
113 %mul5 = mul i64 %i3, %i4
/external/llvm/test/CodeGen/SPARC/
D64spill.ll13 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
24 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
35 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
47 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
58 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
69 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
80 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
91 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
102 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
113 …%0 = tail call i64 asm sideeffect "#$0 $1", "=r,r,~{i0},~{i1},~{i2},~{i3},~{i4},~{i5},~{i6},~{i7},…
/external/clang/test/Sema/
Dtentative-decls.c40 int i4; variable
41 int i4; variable
42 extern int i4;
/external/llvm/test/Transforms/SLPVectorizer/R600/
Dsimplebb.ll19 %i4 = load double, double addrspace(3)* %arrayidx4, align 8
20 %mul5 = fmul double %i3, %i4
39 %i4 = load double, double* %arrayidx4, align 8
40 %mul5 = fmul double %i3, %i4
59 %i4 = load double, double* %arrayidx4, align 8
60 %mul5 = fmul double %i3, %i4
/external/llvm/test/Transforms/InstCombine/
Dsub.ll502 define i4 @test42(i4 %x, i4 %y) {
503 %a = and i4 %y, 7
504 %b = and i4 %x, 7
505 %c = sub i4 %a, %b
506 ret i4 %c
508 ; CHECK-NEXT: [[AND:%.*]] = and i4 %y, 7
509 ; CHECK-NEXT: [[AND1:%.*]] = and i4 %x, 7
510 ; CHECK-NEXT: [[RET:%.*]] = sub nsw i4 [[AND]], [[AND1]]
511 ; CHECK: ret i4 [[RET]]
514 define i4 @test43(i4 %x, i4 %y) {
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