/external/webrtc/src/modules/audio_processing/ns/ |
D | ns_core.c | 22 void WebRtcNs_set_feature_extraction_parameters(NSinst_t* inst) { in WebRtcNs_set_feature_extraction_parameters() argument 24 inst->featureExtractionParams.binSizeLrt = (float)0.1; in WebRtcNs_set_feature_extraction_parameters() 25 inst->featureExtractionParams.binSizeSpecFlat = (float)0.05; in WebRtcNs_set_feature_extraction_parameters() 26 inst->featureExtractionParams.binSizeSpecDiff = (float)0.1; in WebRtcNs_set_feature_extraction_parameters() 29 inst->featureExtractionParams.rangeAvgHistLrt = (float)1.0; in WebRtcNs_set_feature_extraction_parameters() 33 inst->featureExtractionParams.factor1ModelPars = (float)1.20; //for lrt and spectral diff in WebRtcNs_set_feature_extraction_parameters() 34 inst->featureExtractionParams.factor2ModelPars = (float)0.9; //for spectral_flatness: in WebRtcNs_set_feature_extraction_parameters() 38 inst->featureExtractionParams.thresPosSpecFlat = (float)0.6; in WebRtcNs_set_feature_extraction_parameters() 41 inst->featureExtractionParams.limitPeakSpacingSpecFlat = in WebRtcNs_set_feature_extraction_parameters() 42 2 * inst->featureExtractionParams.binSizeSpecFlat; in WebRtcNs_set_feature_extraction_parameters() [all …]
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D | nsx_core.c | 439 static void UpdateNoiseEstimate(NsxInst_t* inst, int offset) { in UpdateNoiseEstimate() argument 447 tmp16 = WebRtcSpl_MaxValueW16(inst->noiseEstLogQuantile + offset, in UpdateNoiseEstimate() 448 inst->magnLen); in UpdateNoiseEstimate() 450 inst->qNoise = 14 - (int) WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND( in UpdateNoiseEstimate() 452 for (i = 0; i < inst->magnLen; i++) { in UpdateNoiseEstimate() 456 inst->noiseEstLogQuantile[offset + i]); in UpdateNoiseEstimate() 460 tmp16 += (WebRtc_Word16) inst->qNoise; //shift to get result in Q(qNoise) in UpdateNoiseEstimate() 466 inst->noiseEstQuantile[i] = WebRtcSpl_SatW32ToW16(tmp32no1); in UpdateNoiseEstimate() 471 static void NoiseEstimationC(NsxInst_t* inst, in NoiseEstimationC() argument 483 tabind = inst->stages - inst->normData; in NoiseEstimationC() [all …]
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D | nsx_core_neon.c | 17 static void UpdateNoiseEstimateNeon(NsxInst_t* inst, int offset) { in UpdateNoiseEstimateNeon() argument 27 int16_t tmp16 = WebRtcSpl_MaxValueW16(inst->noiseEstLogQuantile + offset, in UpdateNoiseEstimateNeon() 28 inst->magnLen); in UpdateNoiseEstimateNeon() 31 inst->qNoise = 14 - (int) WEBRTC_SPL_MUL_16_16_RSFT_WITH_ROUND(kExp2Const, in UpdateNoiseEstimateNeon() 35 int32x4_t qNoise32x4 = vdupq_n_s32(inst->qNoise); in UpdateNoiseEstimateNeon() 37 for (ptr_noiseEstLogQuantile = &inst->noiseEstLogQuantile[offset], in UpdateNoiseEstimateNeon() 38 ptr_noiseEstQuantile = &inst->noiseEstQuantile[0]; in UpdateNoiseEstimateNeon() 39 ptr_noiseEstQuantile < &inst->noiseEstQuantile[inst->magnLen - 3]; in UpdateNoiseEstimateNeon() 85 tmp16 += (int16_t) inst->qNoise; //shift to get result in Q(qNoise) in UpdateNoiseEstimateNeon() 95 static void NoiseEstimationNeon(NsxInst_t* inst, in NoiseEstimationNeon() argument [all …]
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/external/mesa3d/src/gallium/drivers/r300/compiler/ |
D | radeon_program_alu.c | 197 static int is_dst_safe_to_reuse(struct rc_instruction *inst) in is_dst_safe_to_reuse() argument 199 const struct rc_opcode_info *info = rc_get_opcode_info(inst->U.I.Opcode); in is_dst_safe_to_reuse() 204 if (inst->U.I.DstReg.File != RC_FILE_TEMPORARY) in is_dst_safe_to_reuse() 208 if (inst->U.I.SrcReg[i].File == RC_FILE_TEMPORARY && in is_dst_safe_to_reuse() 209 inst->U.I.SrcReg[i].Index == inst->U.I.DstReg.Index) in is_dst_safe_to_reuse() 217 struct rc_instruction *inst) in try_to_reuse_dst() argument 221 if (is_dst_safe_to_reuse(inst)) in try_to_reuse_dst() 222 tmp = inst->U.I.DstReg.Index; in try_to_reuse_dst() 226 return dstregtmpmask(tmp, inst->U.I.DstReg.WriteMask); in try_to_reuse_dst() 230 struct rc_instruction* inst) in transform_ABS() argument [all …]
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D | r500_fragprog.c | 65 struct rc_instruction * inst; in r500_transform_IF() local 85 for (inst = writer->Inst; inst != inst_if; inst = inst->Next) { in r500_transform_IF() 87 rc_get_opcode_info(inst->U.I.Opcode); in r500_transform_IF() 374 uint32_t inst; in r500FragmentProgramDump() local 380 inst0 = inst = code->inst[n].inst0; in r500FragmentProgramDump() 381 fprintf(stderr,"%d\t0:CMN_INST 0x%08x:", n, inst); in r500FragmentProgramDump() 382 switch(inst & 0x3) { in r500FragmentProgramDump() 389 inst & R500_INST_TEX_SEM_WAIT ? "TEX_WAIT" : "", in r500FragmentProgramDump() 390 inst & R500_INST_LAST ? "LAST" : "", in r500FragmentProgramDump() 391 inst & R500_INST_NOP ? "NOP" : "", in r500FragmentProgramDump() [all …]
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D | r500_fragprog_emit.c | 159 static unsigned int translate_arg_rgb(struct rc_pair_instruction *inst, int arg) in translate_arg_rgb() argument 161 unsigned int t = inst->RGB.Arg[arg].Source; in translate_arg_rgb() 163 t |= inst->RGB.Arg[arg].Negate << 11; in translate_arg_rgb() 164 t |= inst->RGB.Arg[arg].Abs << 12; in translate_arg_rgb() 167 t |= fix_hw_swizzle(GET_SWZ(inst->RGB.Arg[arg].Swizzle, comp)) << (3*comp + 2); in translate_arg_rgb() 172 static unsigned int translate_arg_alpha(struct rc_pair_instruction *inst, int i) in translate_arg_alpha() argument 174 unsigned int t = inst->Alpha.Arg[i].Source; in translate_arg_alpha() 175 t |= fix_hw_swizzle(GET_SWZ(inst->Alpha.Arg[i].Swizzle, 0)) << 2; in translate_arg_alpha() 176 t |= inst->Alpha.Arg[i].Negate << 5; in translate_arg_alpha() 177 t |= inst->Alpha.Arg[i].Abs << 6; in translate_arg_alpha() [all …]
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D | radeon_pair_translate.c | 38 static void final_rewrite(struct rc_sub_instruction *inst) in final_rewrite() argument 42 switch(inst->Opcode) { in final_rewrite() 44 inst->SrcReg[2] = inst->SrcReg[1]; in final_rewrite() 45 inst->SrcReg[1].File = RC_FILE_NONE; in final_rewrite() 46 inst->SrcReg[1].Swizzle = RC_SWIZZLE_1111; in final_rewrite() 47 inst->SrcReg[1].Negate = RC_MASK_NONE; in final_rewrite() 48 inst->Opcode = RC_OPCODE_MAD; in final_rewrite() 51 tmp = inst->SrcReg[2]; in final_rewrite() 52 inst->SrcReg[2] = inst->SrcReg[0]; in final_rewrite() 53 inst->SrcReg[0] = tmp; in final_rewrite() [all …]
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D | radeon_program_print.c | 198 struct rc_presub_instruction inst) in rc_print_presub_instruction() argument 201 switch(inst.Opcode){ in rc_print_presub_instruction() 204 rc_print_register(f, inst.SrcReg[0].File, in rc_print_presub_instruction() 205 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr); in rc_print_presub_instruction() 208 rc_print_register(f, inst.SrcReg[1].File, in rc_print_presub_instruction() 209 inst.SrcReg[1].Index,inst.SrcReg[1].RelAddr); in rc_print_presub_instruction() 211 rc_print_register(f, inst.SrcReg[0].File, in rc_print_presub_instruction() 212 inst.SrcReg[0].Index,inst.SrcReg[0].RelAddr); in rc_print_presub_instruction() 215 rc_print_register(f, inst.SrcReg[1].File, in rc_print_presub_instruction() 216 inst.SrcReg[1].Index,inst.SrcReg[1].RelAddr); in rc_print_presub_instruction() [all …]
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D | radeon_program.c | 57 struct rc_instruction * inst = c->Program.Instructions.Next; in rc_local_transform() local 59 while(inst != &c->Program.Instructions) { in rc_local_transform() 60 struct rc_instruction * current = inst; in rc_local_transform() 63 inst = inst->Next; in rc_local_transform() 81 struct rc_instruction * inst, in get_used_temporaries_cb() argument 109 struct rc_instruction * inst; in rc_get_used_temporaries() local 114 for(inst = c->Program.Instructions.Next; in rc_get_used_temporaries() 115 inst != &c->Program.Instructions; inst = inst->Next) { in rc_get_used_temporaries() 117 rc_for_all_reads_mask(inst, get_used_temporaries_cb, &d); in rc_get_used_temporaries() 118 rc_for_all_writes_mask(inst, get_used_temporaries_cb, &d); in rc_get_used_temporaries() [all …]
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D | r300_fragprog_emit.c | 151 static int emit_alu(struct r300_emit_state * emit, struct rc_pair_instruction* inst) in emit_alu() argument 164 code->alu.inst[ip].rgb_inst = translate_rgb_opcode(c, inst->RGB.Opcode); in emit_alu() 165 code->alu.inst[ip].alpha_inst = translate_alpha_opcode(c, inst->Alpha.Opcode); in emit_alu() 169 unsigned int src = use_source(code, inst->RGB.Src[j]); in emit_alu() 171 if (inst->RGB.Src[j].Index >= R300_PFS_NUM_TEMP_REGS) in emit_alu() 172 code->alu.inst[ip].r400_ext_addr |= R400_ADDR_EXT_RGB_MSB_BIT(j); in emit_alu() 174 code->alu.inst[ip].rgb_addr |= src << (6*j); in emit_alu() 177 src = use_source(code, inst->Alpha.Src[j]); in emit_alu() 178 if (inst->Alpha.Src[j].Index >= R300_PFS_NUM_TEMP_REGS) in emit_alu() 179 code->alu.inst[ip].r400_ext_addr |= R400_ADDR_EXT_A_MSB_BIT(j); in emit_alu() [all …]
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D | radeon_vert_fc.c | 37 static void mark_write(void * userdata, struct rc_instruction * inst, in mark_write() argument 55 struct rc_instruction * inst; in reserve_predicate_reg() local 57 for(inst = fc_state->C->Program.Instructions.Next; in reserve_predicate_reg() 58 inst != &fc_state->C->Program.Instructions; in reserve_predicate_reg() 59 inst = inst->Next) { in reserve_predicate_reg() 60 rc_for_all_writes_mask(inst, mark_write, writemasks); in reserve_predicate_reg() 84 struct rc_instruction * inst, in lower_bgnloop() argument 88 rc_insert_new_instruction(fc_state->C, inst->Prev); in lower_bgnloop() 135 struct rc_instruction * inst, in lower_brk() argument 139 inst->U.I.Opcode = RC_OPCODE_RCP; in lower_brk() [all …]
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D | r3xx_vertprog.c | 189 unsigned int * inst) in ei_vector1() argument 191 inst[0] = PVS_OP_DST_OPERAND(hw_opcode, in ei_vector1() 197 inst[1] = t_src(vp, &vpi->SrcReg[0]); in ei_vector1() 198 inst[2] = __CONST(0, RC_SWIZZLE_ZERO); in ei_vector1() 199 inst[3] = __CONST(0, RC_SWIZZLE_ZERO); in ei_vector1() 205 unsigned int * inst) in ei_vector2() argument 207 inst[0] = PVS_OP_DST_OPERAND(hw_opcode, in ei_vector2() 213 inst[1] = t_src(vp, &vpi->SrcReg[0]); in ei_vector2() 214 inst[2] = t_src(vp, &vpi->SrcReg[1]); in ei_vector2() 215 inst[3] = __CONST(1, RC_SWIZZLE_ZERO); in ei_vector2() [all …]
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D | radeon_dataflow.c | 65 struct rc_pair_instruction * inst, in pair_get_src_refmasks() argument 76 inst->RGB.Src[src].Index); in pair_get_src_refmasks() 90 inst->Alpha.Src[src].Index); in pair_get_src_refmasks() 103 struct rc_pair_instruction * inst = &fullinst->U.P; in reads_pair() local 112 GET_SWZ(inst->RGB.Arg[arg].Swizzle, chan); in reads_pair() 114 GET_SWZ(inst->Alpha.Arg[arg].Swizzle, chan); in reads_pair() 115 pair_get_src_refmasks(refmasks, inst, swz_rgb, in reads_pair() 116 inst->RGB.Arg[arg].Source); in reads_pair() 117 pair_get_src_refmasks(refmasks, inst, swz_alpha, in reads_pair() 118 inst->Alpha.Arg[arg].Source); in reads_pair() [all …]
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/external/webrtc/src/common_audio/vad/ |
D | vad_core.c | 66 int WebRtcVad_InitCore(VadInstT *inst, short mode) in WebRtcVad_InitCore() argument 71 inst->vad = 1; in WebRtcVad_InitCore() 72 inst->frame_counter = 0; in WebRtcVad_InitCore() 73 inst->over_hang = 0; in WebRtcVad_InitCore() 74 inst->num_of_speech = 0; in WebRtcVad_InitCore() 77 inst->downsampling_filter_states[0] = 0; in WebRtcVad_InitCore() 78 inst->downsampling_filter_states[1] = 0; in WebRtcVad_InitCore() 79 inst->downsampling_filter_states[2] = 0; in WebRtcVad_InitCore() 80 inst->downsampling_filter_states[3] = 0; in WebRtcVad_InitCore() 85 inst->noise_means[i] = kNoiseDataMeans[i]; in WebRtcVad_InitCore() [all …]
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/external/mesa3d/src/mesa/program/ |
D | prog_opt_constant_fold.c | 34 src_regs_are_constant(const struct prog_instruction *inst, unsigned num_srcs) in src_regs_are_constant() argument 39 if (inst->SrcReg[i].File != PROGRAM_CONSTANT) in src_regs_are_constant() 137 struct prog_instruction *const inst = &prog->Instructions[i]; in _mesa_constant_fold() local 139 switch (inst->Opcode) { in _mesa_constant_fold() 141 if (src_regs_are_constant(inst, 2)) { in _mesa_constant_fold() 146 get_value(prog, &inst->SrcReg[0], a); in _mesa_constant_fold() 147 get_value(prog, &inst->SrcReg[1], b); in _mesa_constant_fold() 154 inst->Opcode = OPCODE_MOV; in _mesa_constant_fold() 155 inst->SrcReg[0] = src_reg_for_vec4(prog, result); in _mesa_constant_fold() 157 inst->SrcReg[1].File = PROGRAM_UNDEFINED; in _mesa_constant_fold() [all …]
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D | programopt.c | 257 struct prog_instruction *newInst, *inst; in _mesa_append_fog_code() local 299 inst = newInst; in _mesa_append_fog_code() 301 if (inst->Opcode == OPCODE_END) in _mesa_append_fog_code() 303 if (inst->DstReg.File == PROGRAM_OUTPUT && in _mesa_append_fog_code() 304 inst->DstReg.Index == FRAG_RESULT_COLOR) { in _mesa_append_fog_code() 306 inst->DstReg.File = PROGRAM_TEMPORARY; in _mesa_append_fog_code() 307 inst->DstReg.Index = colorTemp; in _mesa_append_fog_code() 308 inst->SaturateMode = saturate; in _mesa_append_fog_code() 311 inst++; in _mesa_append_fog_code() 313 assert(inst->Opcode == OPCODE_END); /* we'll overwrite this inst */ in _mesa_append_fog_code() [all …]
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/external/pcre/dist/sljit/ |
D | sljitNativeX86_64.c | 31 sljit_ub *inst; in emit_load_imm64() local 33 inst = (sljit_ub*)ensure_buf(compiler, 1 + 2 + sizeof(sljit_sw)); in emit_load_imm64() 34 FAIL_IF(!inst); in emit_load_imm64() 36 *inst++ = REX_W | ((reg_map[reg] <= 7) ? 0 : REX_B); in emit_load_imm64() 37 *inst++ = MOV_r_i32 + (reg_map[reg] & 0x7); in emit_load_imm64() 38 *(sljit_sw*)inst = imm; in emit_load_imm64() 95 sljit_ub *inst; in sljit_emit_enter() local 116 inst = (sljit_ub*)ensure_buf(compiler, 1 + size); in sljit_emit_enter() 117 FAIL_IF(!inst); in sljit_emit_enter() 120 *inst++ = REX_B; in sljit_emit_enter() [all …]
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D | sljitNativeX86_common.c | 258 #define INC_SIZE(s) (*inst++ = (s), compiler->size += (s)) 260 #define PUSH_REG(r) (*inst++ = (PUSH_r + (r))) 261 #define POP_REG(r) (*inst++ = (POP_r + (r))) 262 #define RET() (*inst++ = (RET_near)) 263 #define RET_I16(n) (*inst++ = (RET_i16), *inst++ = n, *inst++ = 0) 265 #define MOV_RM(mod, reg, rm) (*inst++ = (MOV_r_rm), *inst++ = (mod) << 6 | (reg) << 3 | (rm)) 583 sljit_ub *inst; in emit_save_flags() local 586 inst = (sljit_ub*)ensure_buf(compiler, 1 + 5); in emit_save_flags() 587 FAIL_IF(!inst); in emit_save_flags() 590 inst = (sljit_ub*)ensure_buf(compiler, 1 + 6); in emit_save_flags() [all …]
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D | sljitNativeX86_32.c | 31 sljit_ub *inst; in emit_do_imm() local 33 inst = (sljit_ub*)ensure_buf(compiler, 1 + 1 + sizeof(sljit_sw)); in emit_do_imm() 34 FAIL_IF(!inst); in emit_do_imm() 36 *inst++ = opcode; in emit_do_imm() 37 *(sljit_sw*)inst = imm; in emit_do_imm() 71 sljit_ub *inst; in sljit_emit_enter() local 93 inst = (sljit_ub*)ensure_buf(compiler, 1 + size); in sljit_emit_enter() 94 FAIL_IF(!inst); in sljit_emit_enter() 100 *inst++ = MOV_r_rm; in sljit_emit_enter() 101 *inst++ = MOD_REG | (reg_map[TMP_REG1] << 3) | 0x4 /* esp */; in sljit_emit_enter() [all …]
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | brw_disasm.c | 528 static int dest (FILE *file, struct brw_instruction *inst) in dest() argument 532 if (inst->header.access_mode == BRW_ALIGN_1) in dest() 534 if (inst->bits1.da1.dest_address_mode == BRW_ADDRESS_DIRECT) in dest() 536 err |= reg (file, inst->bits1.da1.dest_reg_file, inst->bits1.da1.dest_reg_nr); in dest() 539 if (inst->bits1.da1.dest_subreg_nr) in dest() 540 format (file, ".%d", inst->bits1.da1.dest_subreg_nr / in dest() 541 reg_type_size[inst->bits1.da1.dest_reg_type]); in dest() 543 err |= control (file, "horiz stride", horiz_stride, inst->bits1.da1.dest_horiz_stride, NULL); in dest() 545 err |= control (file, "dest reg encoding", reg_encoding, inst->bits1.da1.dest_reg_type, NULL); in dest() 550 if (inst->bits1.ia1.dest_subreg_nr) in dest() [all …]
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D | brw_vec4_copy_propagation.cpp | 40 is_direct_copy(vec4_instruction *inst) in is_direct_copy() argument 42 return (inst->opcode == BRW_OPCODE_MOV && in is_direct_copy() 43 !inst->predicate && in is_direct_copy() 44 inst->dst.file == GRF && in is_direct_copy() 45 !inst->saturate && in is_direct_copy() 46 !inst->dst.reladdr && in is_direct_copy() 47 !inst->src[0].reladdr && in is_direct_copy() 48 inst->dst.type == inst->src[0].type); in is_direct_copy() 52 is_dominated_by_previous_instruction(vec4_instruction *inst) in is_dominated_by_previous_instruction() argument 54 return (inst->opcode != BRW_OPCODE_DO && in is_dominated_by_previous_instruction() [all …]
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D | brw_fs_schedule_instructions.cpp | 58 schedule_node(fs_inst *inst) in schedule_node() argument 60 this->inst = inst; in schedule_node() 71 switch (inst->opcode) { in schedule_node() 103 fs_inst *inst; member in schedule_node 132 void add_inst(fs_inst *inst); 136 bool is_compressed(fs_inst *inst); 147 instruction_scheduler::add_inst(fs_inst *inst) in add_inst() argument 149 schedule_node *n = new(mem_ctx) schedule_node(inst); in add_inst() 151 assert(!inst->is_head_sentinel()); in add_inst() 152 assert(!inst->is_tail_sentinel()); in add_inst() [all …]
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D | brw_fs_copy_propagation.cpp | 35 fs_visitor::try_copy_propagate(fs_inst *inst, int arg, acp_entry *entry) in try_copy_propagate() argument 37 if (inst->src[arg].file != entry->dst.file || in try_copy_propagate() 38 inst->src[arg].reg != entry->dst.reg || in try_copy_propagate() 39 inst->src[arg].reg_offset != entry->dst.reg_offset) { in try_copy_propagate() 44 if (inst->conditional_mod && in try_copy_propagate() 45 inst->src[arg].type == BRW_REGISTER_TYPE_UD && in try_copy_propagate() 51 if (intel->gen == 6 && inst->is_math() && in try_copy_propagate() 55 inst->src[arg].file = entry->src.file; in try_copy_propagate() 56 inst->src[arg].reg = entry->src.reg; in try_copy_propagate() 57 inst->src[arg].reg_offset = entry->src.reg_offset; in try_copy_propagate() [all …]
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D | brw_optimize.c | 90 bool brw_is_arithmetic_inst(const struct brw_instruction *inst) in brw_is_arithmetic_inst() argument 92 return brw_opcodes[inst->header.opcode].is_arith; in brw_is_arithmetic_inst() 116 brw_is_grf_written(const struct brw_instruction *inst, in brw_is_grf_written() argument 120 if (brw_opcodes[inst->header.opcode].ndst == 0) in brw_is_grf_written() 123 if (inst->bits1.da1.dest_address_mode != BRW_ADDRESS_DIRECT) in brw_is_grf_written() 124 if (inst->bits1.ia1.dest_reg_file == BRW_GENERAL_REGISTER_FILE) in brw_is_grf_written() 127 if (inst->bits1.da1.dest_reg_file != BRW_GENERAL_REGISTER_FILE) in brw_is_grf_written() 133 const int type_size = inst_type_size[inst->bits1.da1.dest_reg_type]; in brw_is_grf_written() 134 const int write_start = inst->bits1.da1.dest_reg_nr*REG_SIZE in brw_is_grf_written() 135 + inst->bits1.da1.dest_subreg_nr; in brw_is_grf_written() [all …]
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/external/mesa3d/src/gallium/auxiliary/rtasm/ |
D | rtasm_ppc.c | 296 } inst; member 303 union vx_inst inst; in emit_vx() local 304 inst.inst.op = 4; in emit_vx() 305 inst.inst.vD = vD; in emit_vx() 306 inst.inst.vA = vA; in emit_vx() 307 inst.inst.vB = vB; in emit_vx() 308 inst.inst.op2 = op2; in emit_vx() 309 emit_instruction(p, inst.bits); in emit_vx() 329 } inst; member 336 union vxr_inst inst; in emit_vxr() local [all …]
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