/external/llvm/lib/CodeGen/ |
D | MachineInstrBundle.cpp | 163 if (MO.isDead()) { in finalizeBundle() 169 if (!MO.isDead()) in finalizeBundle() 174 if (!MO.isDead()) { in finalizeBundle() 191 bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg); in finalizeBundle() local 192 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle() 320 if (!MO.isDead()) in analyzePhysReg()
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D | DeadMachineInstructionElim.cpp | 46 bool isDead(const MachineInstr *MI) const; 55 bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { in isDead() function in DeadMachineInstructionElim 127 if (isDead(MI)) { in runOnMachineFunction()
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D | MachineInstr.cpp | 148 bool isKill, bool isDead, bool isUndef, in ChangeToRegister() argument 168 IsDead = isDead; in ChangeToRegister() 285 if (isDef() || isKill() || isDead() || isImplicit() || isUndef() || in print() 311 if (isDead()) { in print() 872 if (Check == CheckKillDead && MO.isDead() != OMO.isDead()) in isIdenticalTo() 1175 MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, bool Overlap, in findRegisterDefOperandIdx() argument 1195 if (Found && (!isDead || MO.isDead())) in findRegisterDefOperandIdx() 1482 if (!MO.isDead()) in allDefsAreDead() 1825 } else if (hasAliases && MO.isDead() && in addRegisterDead()
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D | PHIElimination.cpp | 236 bool isDead = MPhi->getOperand(0).isDead(); in LowerPHINode() local 304 if (isDead) { in LowerPHINode() 332 if (DestLI.endIndex().isDead()) { in LowerPHINode()
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D | TailDuplication.cpp | 103 void UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, 232 bool isDead = MBB->pred_empty() && !MBB->hasAddressTaken(); in TailDuplicateAndUpdate() local 234 UpdateSuccessorsPHIs(MBB, isDead, TDBBs, Succs); in TailDuplicateAndUpdate() 237 if (isDead) { in TailDuplicateAndUpdate() 463 TailDuplicatePass::UpdateSuccessorsPHIs(MachineBasicBlock *FromBB, bool isDead, in UpdateSuccessorsPHIs() argument 486 if (isDead) { in UpdateSuccessorsPHIs()
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D | MachineCSE.cpp | 257 if (!MO.isDead() && !isPhysDefTriviallyDead(Reg, I, MBB->end())) in hasLivePhysRegDefUses() 545 if (MO.isImplicit() && !MO.isDead() && CSMI->getOperand(i).isDead()) in ProcessBlock() 550 if (MO.isImplicit() && !MO.isDead() && OldReg == NewReg) in ProcessBlock()
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D | LivePhysRegs.cpp | 75 if (!O->isDead()) in stepForward()
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D | RegAllocFast.cpp | 649 } else if (MO.isDead()) { in reloadVirtReg() 660 } else if (MO.isDead()) { in reloadVirtReg() 676 bool Dead = MO.isDead(); in setPhysReg() 947 definePhysReg(MI, Reg, (MO.isImplicit() || MO.isDead()) ? in AllocateBasicBlock() 1033 definePhysReg(MI, Reg, MO.isDead() ? regFree : regReserved); in AllocateBasicBlock()
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D | LiveInterval.cpp | 63 assert(!Def.isDead() && "Cannot define a value at the dead slot"); in createDeadDef() 535 bool isDead = true; in removeSegment() local 538 isDead = false; in removeSegment() 541 if (isDead) { in removeSegment()
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D | MachineLICM.cpp | 469 if (!MO.isDead()) in ProcessMI() 982 } else if (!MO.isDead()) { in IsLoopInvariantInst() 1428 if (MO.isReg() && MO.isDef() && !MO.isDead()) in Hoist()
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D | MachineVerifier.cpp | 1098 if (MO->isDead()) in checkLiveness() 1127 if (MO->isDead()) { in checkLiveness() 1533 if (S.end.isDead()) { in verifyLiveRangeSegment() 1572 if (!S.end.isDead()) { in verifyLiveRangeSegment()
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D | RegisterScavenging.cpp | 142 if (!isPred && MO.isDead()) in determineKillsAndDefs()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineOperand.h | 289 bool isDead() const { in isDead() function 561 bool isKill = false, bool isDead = false, 587 bool isKill = false, bool isDead = false, 593 assert(!(isDead && !isDef) && "Dead flag on non-def"); 599 Op.IsDead = isDead;
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D | MachineInstr.h | 908 bool isDead = false, bool Overlap = false, 913 MachineOperand *findRegisterDefOperand(unsigned Reg, bool isDead = false, 915 int Idx = findRegisterDefOperandIdx(Reg, isDead, false, TRI);
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ExpandPseudoInsts.cpp | 107 const bool DstIsDead = MI.getOperand(0).isDead(); in tryOrrMovk() 172 const bool DstIsDead = MI.getOperand(0).isDead(); in tryToreplicateChunks() 355 const bool DstIsDead = MI.getOperand(0).isDead(); in trySequenceOfOnes() 524 bool DstIsDead = MI.getOperand(0).isDead(); in expandMOVImm()
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D | AArch64DeadRegisterDefinitionsPass.cpp | 81 if (MO.isReg() && MO.isDead() && MO.isDef()) { in processMachineBasicBlock()
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D | AArch64ConditionOptimizer.cpp | 158 if (I->getOperand(0).isDead()) in findSuitableCompare()
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/external/llvm/lib/Target/ARM/ |
D | Thumb2SizeReduction.cpp | 702 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceTo2Addr() 798 if (HasCC && MI->getOperand(NumOps-1).isDead()) in ReduceToNarrow() 866 if (!MO.isDead()) in UpdateCPSRDef() 976 if (MO && !MO->isDead()) in ReduceMBB()
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D | ARMBaseInstrInfo.h | 396 bool isDead = false) { 397 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
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D | ARMExpandPseudoInsts.cpp | 393 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandVLD() 527 DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandLaneOp() 659 bool DstIsDead = MI.getOperand(0).isDead(); in ExpandMOV32BitImm() 954 bool DstIsDead = MI.getOperand(0).isDead(); in ExpandMI() 976 bool DstIsDead = MI.getOperand(0).isDead(); in ExpandMI() 1029 bool DstIsDead = MI.getOperand(0).isDead(); in ExpandMI() 1091 bool DstIsDead = MI.getOperand(OpIdx).isDead(); in ExpandMI()
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D | MLxExpansionPass.cpp | 276 bool DstDead = MI->getOperand(0).isDead(); in ExpandFPMLxInstruction()
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/external/llvm/test/CodeGen/X86/ |
D | fold-call-oper.ll | 3 ; PR18396: Assertion: MO->isDead "Cannot fold physreg def".
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/external/clang/lib/StaticAnalyzer/Checkers/ |
D | SimpleStreamChecker.cpp | 192 bool IsSymDead = SymReaper.isDead(Sym); in checkDeadSymbols()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonPeephole.cpp | 322 Src.isKill(), Src.isDead(), Src.isUndef(), in ChangeOpInto()
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D | HexagonHardwareLoops.cpp | 164 bool isDead(const MachineInstr *MI, 887 bool HexagonHardwareLoops::isDead(const MachineInstr *MI, in isDead() function in HexagonHardwareLoops 939 if (isDead(MI, DeadPhis)) { in removeIfDead()
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