| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| D | AArch64MCCodeEmitter.cpp | 219 assert(MO.isImm() && "did not expect relocated expression"); in getMachineOpValue()
230 if (MO.isImm()) in getLdStUImm12OpValue()
251 if (MO.isImm()) in getAdrLabelOpValue()
282 if (MO.isImm()) in getAddSubImmOpValue()
304 if (MO.isImm()) in getCondBranchTargetOpValue()
326 if (MO.isImm()) in getLoadLiteralOpValue()
354 if (MO.isImm()) in getMoveWideImmOpValue()
374 if (MO.isImm()) in getTestBranchTargetOpValue()
396 if (MO.isImm()) in getBranchTargetOpValue()
422 assert(MO.isImm() && "Expected an immediate value for the shift amount!"); in getVecShifterOpValue()
[all …]
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsMCCodeEmitter.cpp | 54 assert(Inst.getOperand(2).isImm()); in LowerLargeShift()
94 assert(InstIn.getOperand(2).isImm()); in LowerDextDins()
96 assert(InstIn.getOperand(3).isImm()); in LowerDextDins()
210 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTargetOpValue()
232 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTarget7OpValueMM()
254 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMMPC10()
276 if (MO.isImm()) return MO.getImm() >> 1; in getBranchTargetOpValueMM()
299 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget21OpValue()
321 if (MO.isImm()) return MO.getImm() >> 2; in getBranchTarget26OpValue()
342 if (MO.isImm()) return MO.getImm(); in getJumpOffset16OpValue()
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| /external/llvm/lib/Target/X86/InstPrinter/ |
| D | X86InstComments.cpp | 134 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
145 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
159 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
170 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
184 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
195 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
207 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
219 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
235 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
314 if(MI->getOperand(MI->getNumOperands()-1).isImm()) in EmitAnyX86InstComments()
[all …]
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| D | X86IntelInstPrinter.cpp | 126 if (Op.isImm()) in printPCRelImm()
149 } else if (Op.isImm()) { in printOperand()
187 if (!DispSpec.isImm()) { in printMemReference()
244 if (DispSpec.isImm()) { in printMemOffset()
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| D | X86ATTInstPrinter.cpp | 145 if (Op.isImm()) in printPCRelImm()
167 } else if (Op.isImm()) { in printOperand()
200 if (DispSpec.isImm()) { in printMemReference()
272 if (DispSpec.isImm()) { in printMemOffset()
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| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMMCTargetDesc.cpp | 37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) && in getMCRDeprecationInfo()
38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) && in getMCRDeprecationInfo()
41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) { in getMCRDeprecationInfo()
42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) { in getMCRDeprecationInfo()
43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) { in getMCRDeprecationInfo()
50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) { in getMCRDeprecationInfo()
57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 && in getMCRDeprecationInfo()
58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) { in getMCRDeprecationInfo()
68 if (STI.getFeatureBits() & llvm::ARM::HasV8Ops && MI.getOperand(1).isImm() && in getITDeprecationInfo()
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| /external/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| D | PPCMCCodeEmitter.cpp | 174 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getDirectBrEncoding()
186 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getCondBrEncoding()
199 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsDirectBrEncoding()
212 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getAbsCondBrEncoding()
224 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI); in getImm16Encoding()
241 if (MO.isImm()) in getMemRIEncoding()
260 if (MO.isImm()) in getMemRIXEncoding()
280 assert(MO.isImm()); in getSPE8DisEncoding()
296 assert(MO.isImm()); in getSPE4DisEncoding()
312 assert(MO.isImm()); in getSPE2DisEncoding()
[all …]
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| /external/llvm/lib/Target/Sparc/Disassembler/ |
| D | SparcDisassembler.cpp | 258 bool isImm = fieldFromInstruction(insn, 13, 1); in DecodeMem() local
261 if (isImm) in DecodeMem()
279 if (isImm) in DecodeMem()
374 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeJMPL() local
377 if (isImm) in DecodeJMPL()
393 if (isImm) in DecodeJMPL()
407 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeReturn() local
410 if (isImm) in DecodeReturn()
421 if (isImm) in DecodeReturn()
436 unsigned isImm = fieldFromInstruction(insn, 13, 1); in DecodeSWAP() local
[all …]
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| /external/llvm/lib/Target/R600/AsmParser/ |
| D | AMDGPUAsmParser.cpp | 117 if (isImm()) in addSoppBrTargetOperands()
135 bool isImm() const override { in isImm() function in __anondcc3d2080111::AMDGPUOperand
142 return isImm() && ((Imm.Val <= 64 && Imm.Val >= -16) || in isInlineImm()
148 assert(isImm()); in isDSOffset0()
153 assert(isImm()); in isDSOffset1()
162 assert(isImm()); in getImmTy()
184 return isReg() || isImm(); in isRegOrImm()
196 return isImm() || (isReg() && isRegClass(AMDGPU::SReg_32RegClassID)); in isSSrc32()
200 return isImm() || isInlineImm() || in isSSrc64()
213 return isImm() || (isReg() && isRegClass(AMDGPU::VS_32RegClassID)); in isVSrc32()
[all …]
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonHardwareLoops.cpp | 251 bool isImm() const { return Kind == CV_Immediate; } in isImm() function in __anonfb58bf460111::CountValue
262 assert(isImm() && "Wrong CountValue accessor"); in getImm()
268 if (isImm()) { OS << Contents.ImmVal; } in print()
523 if (Op2.isImm() || Op1.getReg() == IVReg) in getLoopTripCount()
556 assert(EndValue->isImm() && "Unrecognized latch comparison"); in getLoopTripCount()
564 assert(InitialValue->isImm()); in getLoopTripCount()
630 assert (Start->isReg() || Start->isImm()); in computeCount()
631 assert (End->isReg() || End->isImm()); in computeCount()
647 if (Start->isImm() && End->isImm()) { in computeCount()
716 bool RegToImm = Start->isReg() && End->isImm(); // for (reg..imm) in computeCount()
[all …]
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| /external/llvm/lib/Target/Sparc/MCTargetDesc/ |
| D | SparcMCCodeEmitter.cpp | 120 if (MO.isImm()) in getMachineOpValue()
144 if (MO.isReg() || MO.isImm()) in getCallTargetOpValue()
179 if (MO.isReg() || MO.isImm()) in getBranchTargetOpValue()
192 if (MO.isReg() || MO.isImm()) in getBranchPredTargetOpValue()
204 if (MO.isReg() || MO.isImm()) in getBranchOnRegTargetOpValue()
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| /external/llvm/lib/Target/BPF/InstPrinter/ |
| D | BPFInstPrinter.cpp | 56 } else if (Op.isImm()) { in printOperand()
69 if (OffsetOp.isImm()) in printMemOperand()
82 if (Op.isImm()) in printImm64Operand()
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| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| D | MSP430InstPrinter.cpp | 38 if (Op.isImm()) in printPCRelImmOperand()
52 } else if (Op.isImm()) { in printOperand()
80 assert(Disp.isImm() && "Expected immediate in displacement field"); in printSrcMemOperand()
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| /external/llvm/lib/Target/R600/ |
| D | SIFoldOperands.cpp | 62 if (FoldOp->isImm()) { in FoldCandidate()
71 bool isImm() const { in isImm() function
112 if (Fold.isImm()) { in updateOperand()
178 bool FoldingImm = OpToFold.isImm(); in runOnMachineFunction()
277 if (!Fold.isImm()) { in runOnMachineFunction()
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| D | SIShrinkInstructions.cpp | 141 if (Src0.isImm() && in foldImmediates()
159 if (MovSrc.isImm() && isUInt<32>(MovSrc.getImm())) { in foldImmediates()
198 if (Src.isImm()) { in runOnMachineFunction()
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| /external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| D | HexagonInstPrinter.cpp | 132 } else if(MO.isImm()) { in printOperand()
145 } else if(MO.isImm()) { in printImmOperand()
162 } else if (MO.isImm()) { in printExtOperand()
245 assert(MI->getOperand(OpNo).isImm() && "Unknown symbol operand"); in printSymbol()
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| /external/llvm/include/llvm/MC/ |
| D | MCInst.h | 57 bool isImm() const { return Kind == kImmediate; } in isImm() function
75 assert(isImm() && "This is not an immediate"); in getImm()
79 assert(isImm() && "This is not an immediate"); in setImm()
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| /external/llvm/lib/Target/BPF/MCTargetDesc/ |
| D | BPFMCCodeEmitter.cpp | 73 if (MO.isImm()) in getMachineOpValue()
135 uint64_t Imm = MO.isImm() ? MO.getImm() : 0; in EncodeInstruction()
160 assert(Op2.isImm() && "Second operand is not immediate."); in getMemoryOpValue()
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| /external/llvm/lib/Target/Sparc/InstPrinter/ |
| D | SparcInstPrinter.cpp | 67 if (MI->getOperand(2).isImm() && in printSparcAliasInstr()
117 if (MO.isImm()) { in printOperand()
141 if (MO.isImm() && MO.getImm() == 0) in printMemOperand()
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| /external/llvm/lib/Target/X86/AsmParser/ |
| D | X86Operand.h | 131 bool isImm() const override { return Kind == Immediate; } in isImm() function
134 if (!isImm()) in isImmSExti16i8()
148 if (!isImm()) in isImmSExti32i8()
162 if (!isImm()) in isImmSExti64i8()
176 if (!isImm()) in isImmSExti64i32()
191 if (!isImm()) return false; in isImmUnsignedi8()
264 return isImm(); in isAVX512RC()
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| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| D | SystemZAsmParser.cpp | 209 bool isImm() const override { in isImm() function in __anon920606c00111::SystemZOperand
212 bool isImm(int64_t MinValue, int64_t MaxValue) const { in isImm() function in __anon920606c00111::SystemZOperand
312 bool isU4Imm() const { return isImm(0, 15); } in isU4Imm()
313 bool isU6Imm() const { return isImm(0, 63); } in isU6Imm()
314 bool isU8Imm() const { return isImm(0, 255); } in isU8Imm()
315 bool isS8Imm() const { return isImm(-128, 127); } in isS8Imm()
316 bool isU16Imm() const { return isImm(0, 65535); } in isU16Imm()
317 bool isS16Imm() const { return isImm(-32768, 32767); } in isS16Imm()
318 bool isU32Imm() const { return isImm(0, (1LL << 32) - 1); } in isU32Imm()
319 bool isS32Imm() const { return isImm(-(1LL << 31), (1LL << 31) - 1); } in isS32Imm()
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| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| D | PPCInstPrinter.cpp | 275 if (MI->getOperand(OpNo).isImm()) in printS16ImmOperand()
283 if (MI->getOperand(OpNo).isImm()) in printU16ImmOperand()
291 if (!MI->getOperand(OpNo).isImm()) in printBranchOperand()
302 if (!MI->getOperand(OpNo).isImm()) in printAbsBranchOperand()
399 if (Op.isImm()) { in printOperand()
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| /external/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 414 bool isImm() const override { return Kind == k_Immediate; } in isImm() function in __anon26fd99540211::AArch64Operand
417 if (!isImm()) in isSImm9()
426 if (!isImm()) in isSImm7s4()
435 if (!isImm()) in isSImm7s8()
444 if (!isImm()) in isSImm7s16()
487 if (!isImm()) in isUImm12Offset()
499 if (!isImm()) in isImm0_7()
508 if (!isImm()) in isImm1_8()
517 if (!isImm()) in isImm0_15()
526 if (!isImm()) in isImm1_16()
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCBranchSelector.cpp | 143 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm()) in runOnMachineFunction()
146 !I->getOperand(1).isImm()) in runOnMachineFunction()
150 !I->getOperand(0).isImm()) in runOnMachineFunction()
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| /external/llvm/utils/TableGen/ |
| D | FastISelEmitter.cpp | 98 bool isImm() const { return Repr >= OK_Imm; } in isImm() function in __anone694a1120311::OperandsSignature::OpKind
100 unsigned getImmCode() const { assert(isImm()); return Repr-OK_Imm; } in getImmCode()
131 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) in hasAnyImmediateCodes()
141 if (!Operands[i].isImm()) in getWithoutImmCodes()
151 if (!Operands[i].isImm()) continue; in emitImmediatePredicate()
289 } else if (Operands[i].isImm()) { in PrintParameters()
315 } else if (Operands[i].isImm()) { in PrintArguments()
331 } else if (Operands[i].isImm()) { in PrintArguments()
|