/external/llvm/include/llvm/CodeGen/ |
D | CallingConvLower.h | 61 unsigned isMem : 1; variable 82 Ret.isMem = false; in getReg() 105 Ret.isMem = true; in getMem() 131 isMem = false; in convertToReg() 136 isMem = true; in convertToMem() 142 bool isRegLoc() const { return !isMem; } in isRegLoc() 143 bool isMemLoc() const { return isMem; } in isMemLoc()
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/external/llvm/include/llvm/MC/MCParser/ |
D | MCParsedAsmOperand.h | 52 virtual bool isMem() const = 0;
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/external/llvm/lib/Target/SystemZ/AsmParser/ |
D | SystemZAsmParser.cpp | 226 bool isMem() const override { in isMem() function in __anon920606c00111::SystemZOperand 229 bool isMem(RegisterKind RegKind, MemoryKind MemKind) const { in isMem() function in __anon920606c00111::SystemZOperand 236 return isMem(RegKind, MemKind) && inRange(Mem.Disp, 0, 0xfff); in isMemDisp12() 239 return isMem(RegKind, MemKind) && inRange(Mem.Disp, -524288, 524287); in isMemDisp20()
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/external/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 771 else if (isMem()) { in isThumbMemPC() 1095 bool isMem() const override { return Kind == k_Memory; } in isMem() function in __anonef5d38c20311::ARMOperand 1122 if (!isMem()) in isMemNoOffset() 1129 if (!isMem() || Memory.OffsetRegNum != 0 || Memory.Alignment != 0) in isMemPCRelImm12() 1202 if (!isMem() || Memory.Alignment != 0) return false; in isAddrMode2() 1224 if (!isMem() || Memory.Alignment != 0) return false; in isAddrMode3() 1254 if (!isMem() || Memory.Alignment != 0) return false; in isAddrMode5() 1264 if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || in isMemTBB() 1270 if (!isMem() || !Memory.OffsetRegNum || Memory.isNegative || in isMemTBH() 1277 if (!isMem() || !Memory.OffsetRegNum || Memory.Alignment != 0) in isMemRegOffset() [all …]
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/external/llvm/lib/Target/X86/ |
D | X86InstrInfo.h | 134 inline static bool isMem(const MachineInstr *MI, unsigned Op) { in isMem() function
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D | X86AsmPrinter.cpp | 290 assert(isMem(MI, Op) && "Invalid memory reference!"); in printMemReference()
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D | X86FrameLowering.cpp | 1126 bool isMem = RetOpcode == X86::TCRETURNmi || RetOpcode == X86::TCRETURNmi64; in emitEpilogue() local 1130 MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1); in emitEpilogue()
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/external/llvm/lib/Target/X86/AsmParser/ |
D | X86Operand.h | 205 bool isMem() const override { return Kind == Memory; } in isMem() function
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D | X86AsmInstrumentation.cpp | 291 assert(Op.isMem() && "Op should be a memory operand."); in InstrumentMemOperand() 426 if (Op.isMem()) { in InstrumentMOV()
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D | X86AsmParser.cpp | 840 if (!Op1.isMem() || !Op2.isMem()) in doSrcDstMatch() 2170 if (Op.isMem() && Op.Mem.SegReg == 0 && in ParseInstruction() 2182 if (Op.isMem() && Op.Mem.SegReg == 0 && in ParseInstruction()
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/external/llvm/lib/Target/Mips/AsmParser/ |
D | MipsAsmParser.cpp | 867 bool isMem() const override { return Kind == k_Memory; } in isMem() function in __anond0efcad40311::MipsOperand 869 return isMem() && dyn_cast<MCConstantExpr>(getMemOff()); in isConstantMemOff() 872 return isMem() && isConstantMemOff() && isInt<Bits>(getConstantMemOff()); in isMemWithSimmOffset() 875 return isMem() && getMemBase()->isMM16AsmReg(); in isMemWithGRPMM16Base() 878 return isMem() && isConstantMemOff() && isUInt<Bits>(getConstantMemOff()) in isMemWithUimmOffsetSP() 882 return isMem() && isConstantMemOff() && isUInt<Bits>(getConstantMemOff()) in isMemWithUimmWordAlignedOffsetSP()
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/external/llvm/lib/Target/Sparc/AsmParser/ |
D | SparcAsmParser.cpp | 184 bool isMem() const override { return isMEMrr() || isMEMri(); } in isMem() function in __anoncba7d3b40111::SparcOperand
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/external/llvm/lib/Target/R600/AsmParser/ |
D | AMDGPUAsmParser.cpp | 220 bool isMem() const override { in isMem() function in __anondcc3d2080111::AMDGPUOperand
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/external/llvm/lib/Target/PowerPC/AsmParser/ |
D | PPCAsmParser.cpp | 514 bool isMem() const override { return false; } in isMem() function
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/external/llvm/lib/Target/AArch64/AsmParser/ |
D | AArch64AsmParser.cpp | 415 bool isMem() const override { return false; } in isMem() function in __anon26fd99540211::AArch64Operand
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrFormats.td | 2386 let PredicateMethod = "isMem" # Reg # "Extend<" # Width # ">";
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