Searched refs:lanes_ (Results 1 – 1 of 1) sorted by relevance
263 VRegister() : CPURegister(), lanes_(1) {} in VRegister()265 : CPURegister(other.code(), other.size(), other.type()), lanes_(1) { in VRegister()267 VIXL_ASSERT(IsPowerOf2(lanes_) && (lanes_ <= 16)); in VRegister()270 : CPURegister(code, size, kVRegister), lanes_(lanes) { in CPURegister()271 VIXL_ASSERT(IsPowerOf2(lanes_) && (lanes_ <= 16)); in CPURegister()275 lanes_(IsVectorFormat(format) ? LaneCountFromFormat(format) : 1) { in VRegister()276 VIXL_ASSERT(IsPowerOf2(lanes_) && (lanes_ <= 16)); in VRegister()300 bool Is8B() const { return (Is64Bits() && (lanes_ == 8)); } in Is8B()301 bool Is16B() const { return (Is128Bits() && (lanes_ == 16)); } in Is16B()302 bool Is4H() const { return (Is64Bits() && (lanes_ == 4)); } in Is4H()[all …]