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Searched refs:ldc2 (Results 1 – 25 of 39) sorted by relevance

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/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-armv8.txt154 # CHECK-V7: ldc2
159 # CHECK-V7: ldc2
164 # CHECK-V7: ldc2
Dinvalid-thumbv8.txt154 # CHECK-V7: ldc2
159 # CHECK-V7: ldc2
164 # CHECK-V7: ldc2
/external/llvm/test/MC/Mips/mips1/
Dinvalid-mips2-wrong-error.s10ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-mips3-wrong-error.s11ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-mips4-wrong-error.s13ldc2 $8,-21181($at) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
/external/llvm/test/MC/Mips/mips2/
Dvalid.s68ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Disassembler/Mips/
Dmips64.txt92 # CHECK: ldc2 $3, 9162($8)
/external/llvm/test/MC/Mips/mips32/
Dvalid.s77ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/
Dmips-fpu-instructions.s177 # CHECK: ldc2 $11, 12($ra) # encoding: [0x0c,0x00,0xeb,0xdb]
212 ldc2 $11, 12($ra)
/external/llvm/test/MC/Mips/mips32r3/
Dvalid.s86ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips32r5/
Dvalid.s86ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s86ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips3/
Dvalid.s121ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips4/
Dvalid.s125ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips5/
Dvalid.s125ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/ARM/
Ddiagnostics.s394 ldc2 p2, c8, [r1], { 256 }
395 ldc2 p2, c8, [r1], { -1 }
398 @ CHECK-ERRORS: ldc2 p2, c8, [r1], { 256 }
401 @ CHECK-ERRORS: ldc2 p2, c8, [r1], { -1 }
Dbasic-thumb2-instructions.s666 ldc2 p0, c8, [r1, #4]
667 ldc2 p1, c7, [r2]
668 ldc2 p2, c6, [r3, #-224]
669 ldc2 p3, c5, [r4, #-120]!
670 ldc2 p4, c4, [r5], #16
671 ldc2 p5, c3, [r6], #-72
692 ldc2 p2, c8, [r1], { 25 }
694 @ CHECK: ldc2 p0, c8, [r1, #4] @ encoding: [0x91,0xfd,0x01,0x80]
695 @ CHECK: ldc2 p1, c7, [r2] @ encoding: [0x92,0xfd,0x00,0x71]
696 @ CHECK: ldc2 p2, c6, [r3, #-224] @ encoding: [0x13,0xfd,0x38,0x62]
[all …]
Dbasic-arm-instructions.s1061 ldc2 p0, c8, [r1, #4]
1062 ldc2 p1, c7, [r2]
1063 ldc2 p2, c6, [r3, #-224]
1064 ldc2 p3, c5, [r4, #-120]!
1065 ldc2 p4, c4, [r5], #16
1066 ldc2 p5, c3, [r6], #-72
1100 ldc2 p2, c8, [r1], { 25 }
1102 @ CHECK: ldc2 p0, c8, [r1, #4] @ encoding: [0x01,0x80,0x91,0xfd]
1103 @ CHECK: ldc2 p1, c7, [r2] @ encoding: [0x00,0x71,0x92,0xfd]
1104 @ CHECK: ldc2 p2, c6, [r3, #-224] @ encoding: [0x38,0x62,0x13,0xfd]
[all …]
/external/llvm/test/MC/Mips/mips64/
Dvalid.s130ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips64r3/
Dvalid.s146ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips64r5/
Dvalid.s146ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Mips/mips64r2/
Dvalid.s146ldc2 $8,-21181($at) # CHECK: ldc2 $8, -21181($1) # encoding: [0xd8,0x28,0xad,0x43]
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6.txt141 0x49 0xc8 0x0d 0x43 # CHECK: ldc2 $8, -701($1)
Dvalid-mips32r6-el.txt141 0x43 0x0d 0xc8 0x49 # CHECK: ldc2 $8, -701($1)
/external/llvm/test/MC/Disassembler/Mips/mips2/
Dvalid-mips2.txt56 0xd8 0x28 0xad 0x43 # CHECK: ldc2 $8, -21181($1)

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