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Searched refs:ldrd (Results 1 – 25 of 46) sorted by relevance

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/external/llvm/test/MC/ARM/
Darm-ldrd.s5 ldrd r1, r2, [pc, #0] label
6 ldrd r1, r2, [r3, #4] label
7 ldrd r1, r2, [r3], #4 label
8 ldrd r1, r2, [r3, #4]! label
9 ldrd r1, r2, [r3, -r4]! label
10 ldrd r1, r2, [r3, r4] label
11 ldrd r1, r2, [r3], r4 label
20 ldrd r0, r3, [pc, #0] label
21 ldrd r0, r3, [r4, #4] label
22 ldrd r0, r3, [r4], #4 label
[all …]
Dldrd-strd-gnu-arm.s8 @ CHECK: ldrd r0, r1, [r10, #32]! @ encoding: [0xd0,0x02,0xea,0xe1]
9 @ CHECK: ldrd r0, r1, [r10], #32 @ encoding: [0xd0,0x02,0xca,0xe0]
10 @ CHECK: ldrd r0, r1, [r10, #32] @ encoding: [0xd0,0x02,0xca,0xe1]
11 ldrd r0, [r10, #32]!
12 ldrd r0, [r10], #32
13 ldrd r0, [r10, #32]
Dldrd-strd-gnu-thumb.s8 @ CHECK: ldrd r0, r1, [r10, #512]! @ encoding: [0xfa,0xe9,0x80,0x01]
9 @ CHECK: ldrd r0, r1, [r10], #512 @ encoding: [0xfa,0xe8,0x80,0x01]
10 @ CHECK: ldrd r0, r1, [r10, #512] @ encoding: [0xda,0xe9,0x80,0x01]
11 ldrd r0, [r10, #512]!
12 ldrd r0, [r10], #512
13 ldrd r0, [r10, #512]
Dthumb2-ldrd.s6 ldrd r0, r0, [pc, #0] label
7 ldrd r0, r0, [r1, #4] label
8 ldrd r0, r0, [r1], #4 label
9 ldrd r0, r0, [r1, #4]! label
Dldrd-strd-gnu-arm-bad-imm.s4 @ CHECK: ldrd r0, [r0, #512]
5 ldrd r0, [r0, #512]
Dldrd-strd-gnu-thumb-bad-regs.s5 @ CHECK: ldrd r12, [r0, #512]
6 ldrd r12, [r0, #512]
Dldrd-strd-gnu-sp.s6 ldrd r12, [r0, #32]
Dinvalid-vector-index.s3 ldrd r6, r7 [r2, #15] label
Dbig-endian-arm-fixup.s68 ldrd r0, r1, arm_adr_pcrel_10_unscaled_label+24
Ddiagnostics.s372 @ Out of order Rt/Rt2 operands for ldrd
373 ldrd r4, r3, [r8]
374 ldrd r4, r3, [r8, #8]!
375 ldrd r4, r3, [r8], #8
377 @ CHECK-ERRORS: ldrd r4, r3, [r8]
380 @ CHECK-ERRORS: ldrd r4, r3, [r8, #8]!
383 @ CHECK-ERRORS: ldrd r4, r3, [r8], #8
/external/llvm/test/MC/Disassembler/ARM/
Dmemory-arm-instructions.txt107 # CHECK: ldrd r0, r1, [r5]
108 # CHECK: ldrd r8, r9, [r2, #15]
109 # CHECK: ldrd r2, r3, [r9, #32]!
110 # CHECK: ldrd r6, r7, [r1], #8
111 # CHECK: ldrd r2, r3, [r8], #0
112 # CHECK: ldrd r2, r3, [r8], #0
113 # CHECK: ldrd r2, r3, [r8], #-0
131 # CHECK: ldrd r4, r5, [r1, r3]
132 # CHECK: ldrd r4, r5, [r7, r2]!
133 # CHECK: ldrd r0, r1, [r8], r12
[all …]
Dldrd-armv4.txt13 # V5TE: ldrd
/external/llvm/test/CodeGen/ARM/
Dldrd.ll17 ; A8: ldrd r2, r3, [r2]
20 ; M3-NOT: ldrd
42 ; BASIC: ldrd
46 ; GREEDY: ldrd
82 ; A8: ldrd [[FIELD1:r[0-9]+]], [[FIELD2:r[0-9]+]], {{\[}}[[BASE]], #4]
D2011-03-15-LdStMultipleBug.ll3 ; Do not form Thumb2 ldrd / strd if the offset is not multiple of 4.
13 ; CHECK-NOT: ldrd
D2012-10-04-AAPCS-byval-align8.ll32 ; CHECK: ldrd r2, [[TMP:r[0-9]+]], {{\[}}[[BASE]]{{\]}}
59 ; CHECK: ldrd r2, [[TMP:r[0-9]+]], {{\[}}[[BASE]]{{\]}}
Dgpr-paired-spill.ll22 ; CHECK-WITH-LDRD: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp, #8]
23 ; CHECK-WITH-LDRD: ldrd {{r[0-9]+}}, {{r[0-9]+}}, [sp]
Dinlineasm-64bit.ll59 %1 = tail call i64 asm "ldrd $0, ${0:H}, [$1]", "=r,r"(i64* %p) nounwind
65 ; CHECK: ldrd {{r[0-9]?[02468]}}, {{r[0-9]?[13579]}}
66 %1 = tail call i64 asm "ldrd ${0:Q}, ${0:R}, [$1]", "=r,r"(i64* %p) nounwind
/external/libvpx/libvpx/vp8/encoder/arm/armv6/
Dwalsh_v6.asm27 ldrd r4, r5, [r0], r2
29 ldrd r6, r7, [r0], r2
35 ldrd r8, r9, [r0], r2
40 ldrd r10, r11, [r0]
Dvp8_short_fdct4x4_armv6.asm26 ldrd r4, r5, [r0] ; [i1 | i0] [i3 | i2]
49 ldrd r8, r9, [r0] ; [i5 | i4] [i7 | i6]
74 ldrd r4, r5, [r0] ; [i9 | i8] [i11 | i10]
99 ldrd r4, r5, [r0] ; [i13 | i12] [i15 | i14]
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-ldrd.ll7 ; CHECK: ldrd
/external/v8/test/cctest/
Dtest-disasm-arm.cc869 COMPARE(ldrd(r0, r1, MemOperand(r1)), in TEST()
871 COMPARE(ldrd(r2, r3, MemOperand(r3, 127)), in TEST()
873 COMPARE(ldrd(r4, r5, MemOperand(r5, -127)), in TEST()
875 COMPARE(ldrd(r6, r7, MemOperand(r7, 127, PostIndex)), in TEST()
877 COMPARE(ldrd(r8, r9, MemOperand(r9, -127, PostIndex)), in TEST()
879 COMPARE(ldrd(r10, fp, MemOperand(fp, 127, PreIndex)), in TEST()
881 COMPARE(ldrd(ip, sp, MemOperand(sp, -127, PreIndex)), in TEST()
/external/jpeg/
Darmv6_idct.S132 ldrd r10, constants
234 ldrd r10, constants
/external/lldb/test/arm_emulation/new-test-files/
Dtest-ldrd-1-arm.dat2 assembly_string="ldrd r0, r1, [r12, #+4]"
Dtest-ldrd-2-thumb.dat2 assembly_string="ldrd r4, r5, [pc, #-0]"
Dtest-ldrd-1-thumb.dat2 assembly_string="ldrd r0, r1, [r12, #+4]"

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