| /external/llvm/test/MC/AArch64/ |
| D | arm64-elf-relocs.s | 92 ldrsb w5, [x7, #:lo12:sym]
93 ldrsb x11, [x13, :lo12:sym]
105 ldrsb w23, [x19, #:dtprel_lo12:sym]
106 ldrsb x17, [x13, :dtprel_lo12_nc:sym]
118 ldrsb w3, [x4, #:tprel_lo12_nc:sym]
119 ldrsb x5, [x6, :tprel_lo12:sym]
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| D | arm64-tls-relocs.s | 121 ldrsb x29, [x28, #:tprel_lo12_nc:var]
245 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
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| D | tls-relocs.s | 129 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
331 ldrsb x29, [x28, #:tprel_lo12_nc:var]
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| D | basic-a64-diagnostics.s | 1987 ldrsb x2, [x3], #256
1988 ldrsb x22, [x13], #-257
2012 ldrsb w2, [x3], #256
2013 ldrsb w22, [x13], #-257
2170 ldrsb x2, [x3, #256]!
2171 ldrsb x22, [x13, #-257]!
2195 ldrsb w2, [x3, #256]!
2196 ldrsb w22, [x13, #-257]!
2439 ldrsb w9, [x4, x2, lsl #-1]
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| D | arm64-memory.s | 20 ldrsb w9, [x3]
21 ldrsb x2, [sp, #128]
55 ; CHECK: ldrsb w9, [x3] ; encoding: [0x69,0x00,0xc0,0x39]
56 ; CHECK: ldrsb x2, [sp, #128] ; encoding: [0xe2,0x03,0x82,0x39]
607 ldrsb w6, [x4, #-1]
608 ldrsb x7, [x5, #-1]
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| D | basic-a64-instructions.s | 2425 ldrsb w27, [sp, #4095]
2426 ldrsb xzr, [x15]
2525 ldrsb w10, [x30, x7]
2529 ldrsb w15, [x25, w7, uxtw #0]
2531 ldrsb x18, [x22, w10, sxtw #0]
2700 ldrsb xzr, [x9], #255
2701 ldrsb x2, [x3], #1
2702 ldrsb x19, [x12], #-256
2719 ldrsb wzr, [x9], #255
2720 ldrsb w2, [x3], #1
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4
195 # CHECK: ldrsb r2, [r7, #17
196 # CHECK: ldrsb r1, [r8, #255]!
197 # CHECK: ldrsb r12, [sp], #9
213 # CHECK: ldrsb r6, [r5, r4
214 # CHECK: ldrsb r3, [r8, r11]!
215 # CHECK: ldrsb r1, [r2, -r1]!
216 # CHECK: ldrsb r9, [r7], r2
217 # CHECK: ldrsb r4, [r3], -r2
|
| D | thumb2.txt | 786 # CHECK: ldrsb r5, [r5, #-4]
787 # CHECK: ldrsb.w r5, [r6, #32]
788 # CHECK: ldrsb.w r5, [r6, #33]
789 # CHECK: ldrsb.w r5, [r6, #257]
790 # CHECK: ldrsb.w lr, [r7, #257]
802 # CHECK: ldrsb.w r1, [r8, r1]
803 # CHECK: ldrsb.w r4, [r5, r2]
804 # CHECK: ldrsb.w r6, [r0, r2, lsl #3]
805 # CHECK: ldrsb.w r8, [r8, r2, lsl #2]
806 # CHECK: ldrsb.w r7, [sp, r2, lsl #1]
[all …]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | trunc_ldr.ll | 28 ; CHECK: ldrsb{{.*}}7
29 ; CHECK-NOT: ldrsb{{.*}}7
|
| D | fast-isel-ldrh-strh-arm.ll | 128 ; ARM: ldrsb r0, [r0, #-8]
137 ; ARM: ldrsb r0, [r0, #-255]
148 ; ARM: ldrsb r0, [r0]
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| D | fast-isel-fold.ll | 77 ; ARM: ldrsb
80 ; THUMB: ldrsb
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| D | load.ll | 31 ; CHECK: ldrsb
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| D | ldr_ext.ll | 18 ; CHECK: ldrsb
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| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-ldr_ext.ll | 33 ; CHECK: ldrsb
34 ; CHECK-NOT: ldrsb
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| D | thumb2-ldr_pre.ll | 31 ; CHECK: ldrsb{{.*}}!
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-abi.ll | 10 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
11 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
13 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp]
15 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
16 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
18 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp]
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| D | fast-isel-int-ext2.ll | 221 ; CHECK: ldrsb w0, [x0, x1]
249 ; CHECK: ldrsb x0, [x0, x1]
367 ; CHECK: ldrsb w0, [x0, w1, sxtw]
397 ; CHECK: ldrsb x0, [x0, w1, sxtw]
|
| D | fast-isel-int-ext.ll | 318 ; CHECK: ldrsb w0, [x0, x1]
340 ; CHECK: ldrsb x0, [x0, x1]
434 ; CHECK: ldrsb w0, [x0, w1, sxtw]
458 ; CHECK: ldrsb x0, [x0, w1, sxtw]
|
| D | neon-truncStore-extLoad.ll | 36 ; CHECK: ldrsb
|
| D | ldst-unsignedimm.ll | 23 ; CHECK: ldrsb {{w[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var_8bit]
41 ; CHECK: ldrsb {{x[0-9]+}}, [{{x[0-9]+}}, {{#?}}:lo12:var_8bit]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 858 ldrsb r11, [pc, #-0]
864 @ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
1068 ldrsb r5, [r5, #-4]
1069 ldrsb r5, [r6, #32]
1070 ldrsb r5, [r6, #33]
1071 ldrsb r5, [r6, #257]
1072 ldrsb.w lr, [r7, #257]
1074 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c]
1075 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50]
1076 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50]
[all …]
|
| D | diagnostics.s | 560 ldrsb r0, [r0, #1]!
561 ldrsb r0, [r0, r1]!
562 ldrsb r0, [r0], #1
563 ldrsb r0, [r0], r1
616 @ CHECK-ERRORS: ldrsb r0, [r0, r1]!
622 @ CHECK-ERRORS: ldrsb r0, [r0], r1
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 30 # CHECK: ldrsb w9, [x3]
31 # CHECK: ldrsb x2, [sp, #128]
559 # CHECK: ldrsb w0, [x1, x0, lsl #0]
563 # CHECK: ldrsb x0, [x1, x0, lsl #0]
|
| /external/libvpx/libvpx/vp8/encoder/arm/armv5te/ |
| D | vp8_packtokens_armv5.asm | 98 ldrsb lr, [r10, lr] ; i = vp8_coef_tree[i+bb]
199 ldrsb lr, [r10, lr] ; i = b->tree[i+bb]
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| D | vp8_packtokens_mbrow_armv5.asm | 119 ldrsb lr, [r10, lr] ; i = vp8_coef_tree[i+bb]
220 ldrsb lr, [r10, lr] ; i = b->tree[i+bb]
|