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/external/llvm/test/MC/AArch64/
Dneon-mov.s11 movi v15.2s, #1, lsl #8
12 movi v16.2s, #1, lsl #16
13 movi v31.2s, #1, lsl #24
15 movi v0.4s, #1, lsl #8
16 movi v0.4s, #1, lsl #16
17 movi v0.4s, #1, lsl #24
19 movi v0.4h, #1, lsl #8
21 movi v0.8h, #1, lsl #8
42 mvni v0.2s, #1, lsl #8
43 mvni v0.2s, #1, lsl #16
[all …]
Darm64-arithmetic-encoding.s33 add w3, w4, #1024, lsl #0
35 add x3, x4, #1024, lsl #0
42 add w3, w4, #1024, lsl #12
44 add w3, w4, #0, lsl #12
45 add x3, x4, #1024, lsl #12
47 add x3, x4, #0, lsl #12
50 ; CHECK: add w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x11]
51 ; CHECK: add w3, w4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x11]
52 ; CHECK: add w3, w4, #0, lsl #12 ; encoding: [0x83,0x00,0x40,0x11]
53 ; CHECK: add x3, x4, #1024, lsl #12 ; encoding: [0x83,0x00,0x50,0x91]
[all …]
Darm64-logical-encoding.s52 and w1, w2, w3, lsl #2
53 and x1, x2, x3, lsl #2
63 ; CHECK: and w1, w2, w3, lsl #2 ; encoding: [0x41,0x08,0x03,0x0a]
64 ; CHECK: and x1, x2, x3, lsl #2 ; encoding: [0x41,0x08,0x03,0x8a]
74 ands w1, w2, w3, lsl #2
75 ands x1, x2, x3, lsl #2
85 ; CHECK: ands w1, w2, w3, lsl #2 ; encoding: [0x41,0x08,0x03,0x6a]
86 ; CHECK: ands x1, x2, x3, lsl #2 ; encoding: [0x41,0x08,0x03,0xea]
96 bic w1, w2, w3, lsl #3
97 bic x1, x2, x3, lsl #3
[all …]
Dbasic-a64-diagnostics.s69 add sp, x5, x7, lsl
81 add w4, w5, #-1, lsl #12
82 add w5, w6, #0x1000, lsl #12
97 add w2, w3, #0x1, lsl #1
98 add w5, w17, #0xfff, lsl #13
99 add w17, w20, #0x1000, lsl #12
100 sub xsp, x34, #0x100, lsl #-1
152 subs x5, xzr, #0x456, lsl #12
165 mov wsp, w27, #0xfff, lsl #12
197 add w1, w2, w3, lsl #-1
[all …]
Dbasic-a64-instructions.s250 sub sp, x3, x7, lsl #4
251 add w2, wsp, w3, lsl #1
252 cmp wsp, w9, lsl #0
253 adds wzr, wsp, w3, lsl #4
254 subs x3, sp, x9, lsl #2
269 add w30, w29, #1, lsl #12
270 add w13, w5, #4095, lsl #12
279 add w20, wsp, #801, lsl #0
288 add x3, x24, #4095, lsl #12
298 sub w4, w20, #546, lsl #12
[all …]
/external/valgrind/none/tests/arm/
Dv6intThumb.stdout.exp2145 adds.w r1, r2, r3, lsl #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2146 adds.w r1, r2, r3, lsl #1 :: rd 0x7f718777 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2147 adds.w r1, r2, r3, lsl #15 :: rd 0x3cd55927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2148 adds.w r1, r2, r3, lsl #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0x00000000…
2157 add.w r1, r2, r3, lsl #0 :: rd 0x5859704f rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2158 add.w r1, r2, r3, lsl #1 :: rd 0x7f718777 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2159 add.w r1, r2, r3, lsl #15 :: rd 0x3cd55927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2160 add.w r1, r2, r3, lsl #31 :: rd 0x31415927 rm 0x31415927, rn 0x27181728, c:v-in 0, cpsr 0xc0000000…
2169 adds.w r1, r2, r3, lsl #0 :: rd 0xc859704f rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x80000000…
2170 adds.w r1, r2, r3, lsl #1 :: rd 0x5f718777 rm 0x31415927, rn 0x97181728, c:v-in 0, cpsr 0x00000000…
[all …]
/external/boringssl/linux-arm/crypto/aes/
Daes-armv4.S184 orr r0,r0,r4,lsl#8
186 orr r0,r0,r5,lsl#16
188 orr r0,r0,r6,lsl#24
191 orr r1,r1,r4,lsl#8
193 orr r1,r1,r5,lsl#16
195 orr r1,r1,r6,lsl#24
198 orr r2,r2,r4,lsl#8
200 orr r2,r2,r5,lsl#16
202 orr r2,r2,r6,lsl#24
205 orr r3,r3,r4,lsl#8
[all …]
/external/jpeg/
Darmv6_idct.S119 rsb r4, r0, r4, lsl #1
120 rsb r2, r6, r2, lsl #1
141 sub r7, r1, r7, lsl #1
143 rsb r5, r3, r5, lsl #1
144 add r3, r1, r3, lsl #1
159 sub r6, r0, r6, lsl #1
171 sub r2, r4, r2, lsl #1
179 rsb r7, r3, r5, lsl #3
180 sub r3, r0, r3, lsl #1
183 rsb r5, r1, r8, lsl #3
[all …]
/external/libvpx/libvpx/vp8/common/arm/armv6/
Dintra4x4_predict_v6.asm37 addlt pc, pc, r3, lsl #2 ; position independent switch
69 add r12, r12, r12, lsl #8
71 add r12, r12, r12, lsl #16
91 add r9, r9, r9, lsl #16 ; [tl|tl]
97 add r4, r4, r4, lsl #16 ; l[0|0]
98 add r5, r5, r5, lsl #16 ; l[1|1]
99 add r6, r6, r6, lsl #16 ; l[2|2]
100 add r7, r7, r7, lsl #16 ; l[3|3]
110 add r12, r1, r2, lsl #8 ; [3|2|1|0]
119 add r12, r4, r5, lsl #8 ; [3|2|1|0]
[all …]
Ddequant_idct_v6.asm69 pkhbt r7, r7, r9, lsl #16
71 pkhbt r8, r8, r10, lsl #16
77 pkhbt r9, r9, r11, lsl #16
79 pkhbt r10, r10, r7, lsl #16
107 pkhbt r11, r8, r6, lsl #16
108 pkhbt r1, lr, r1, lsl #16
109 pkhbt r12, r10, r12, lsl #16
112 pkhbt lr, r9, r7, lsl #16
121 pkhbt r1, r7, r1, lsl #16
123 pkhbt r11, r9, r11, lsl #16
[all …]
Dloopfilter_v6.asm32 orr $b1, $b0, $b1, lsl #8 ; 12 02 10 00
33 orr $b3, $b2, $b3, lsl #8 ; 32 22 30 20
39 orr $a0, $a0, $a1, lsl #8 ; 13 03 11 01
40 orr $a2, $a2, $a3, lsl #8 ; 33 23 31 21
43 pkhbt $b0, $b1, $b3, lsl #16 ; 30 20 10 00 -- p3
46 pkhbt $b1, $a0, $a2, lsl #16 ; 31 21 11 01 -- p2
66 sub src, src, pstep, lsl #2 ; move src pointer down by 4 lines
76 orr r4, r4, r4, lsl #8
78 orr r2, r2, r2, lsl #8
79 mov count, count, lsl #1 ; 4-in-parallel
[all …]
Dfilter_v6.asm41 mov r3, r3, lsl #1 ; multiply width by 2 because using shorts
50 mov r7, r7, lsl #16 ; height is top part of counter
62 pkhbt lr, r8, r9, lsl #16 ; r9 | r8
63 pkhbt r8, r9, r10, lsl #16 ; r10 | r9
68 pkhbt r10, r10, r11, lsl #16 ; r11 | r10
70 pkhbt r11, r11, r9, lsl #16 ; r9 | r11
79 pkhbt r9, r9, r10, lsl #16 ; r10 | r9
80 pkhbt r10, r10, r11, lsl #16 ; r11 | r10
131 mov r3, r3, lsl #1 ; multiply width by 2 because using shorts
140 mov r7, r7, lsl #16 ; height is top part of counter
[all …]
Dsimpleloopfilter_v6.asm30 orr $b1, $b0, $b1, lsl #8 ; 12 02 10 00
31 orr $b3, $b2, $b3, lsl #8 ; 32 22 30 20
37 orr $a0, $a0, $a1, lsl #8 ; 13 03 11 01
38 orr $a2, $a2, $a3, lsl #8 ; 33 23 31 21
41 pkhbt $b0, $b1, $b3, lsl #16 ; 30 20 10 00 -- p3
44 pkhbt $b1, $a0, $a2, lsl #16 ; 31 21 11 01 -- p2
62 ldr r3, [src, -pstep, lsl #1] ; p1
66 orr r12, r12, r12, lsl #8 ; blimit
68 orr r12, r12, r12, lsl #16 ; blimit
173 pkhbt r9, r3, r4, lsl #16
[all …]
/external/webrtc/src/common_audio/signal_processing/
Dspl_sqrt_floor.s23 adc r2, r1, r2, lsl #1
27 adc r2, r1, r2, lsl #1
31 adc r2, r1, r2, lsl #1
35 adc r2, r1, r2, lsl #1
39 adc r2, r1, r2, lsl #1
43 adc r2, r1, r2, lsl #1
47 adc r2, r1, r2, lsl #1
51 adc r2, r1, r2, lsl #1
55 adc r2, r1, r2, lsl #1
59 adc r2, r1, r2, lsl #1
[all …]
/external/llvm/test/CodeGen/AArch64/
Darm64-large-frame.ll14 ; CHECK: sub sp, sp, #4095, lsl #12
15 ; CHECK: sub sp, sp, #4095, lsl #12
16 ; CHECK: sub sp, sp, #1575, lsl #12
21 ; CHECK: add [[TMP:x[0-9]+]], sp, #4095, lsl #12
22 ; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #787, lsl #12
29 ; CHECK: add [[TMP:x[0-9]+]], sp, #4095, lsl #12
30 ; CHECK: add [[TMP1:x[0-9]+]], [[TMP]], #787, lsl #12
42 ; CHECK: add sp, sp, #4095, lsl #12
43 ; CHECK: add sp, sp, #4095, lsl #12
44 ; CHECK: add sp, sp, #1575, lsl #12
[all …]
Darm64-movi.ll54 ; CHECK: movz x0, #0x5, lsl #48
55 ; CHECK-NEXT: movk x0, #0x1234, lsl #32
56 ; CHECK-NEXT: movk x0, #0xabcd, lsl #16
63 ; CHECK: movz x0, #0x5, lsl #32
64 ; CHECK-NEXT: movk x0, #0x4321, lsl #16
70 ; CHECK: movz x0, #0x8654, lsl #32
87 ; CHECK: movn x0, #0x29, lsl #32
100 ; CHECK: movk x0, #0xdead, lsl #16
107 ; CHECK: movk x0, #0xdead, lsl #48
114 ; CHECK: movk x0, #0xdead, lsl #32
[all …]
Dmul_pow2.ll8 ; CHECK: lsl w0, w0, #1
16 ; CHECK: add w0, w0, w0, lsl #1
24 ; CHECK: lsl w0, w0, #2
32 ; CHECK: add w0, w0, w0, lsl #2
41 ; CHECK: lsl {{w[0-9]+}}, w0, #3
50 ; CHECK: lsl w0, w0, #3
58 ; CHECK: add w0, w0, w0, lsl #3
69 ; CHECK: neg w0, w0, lsl #1
77 ; CHECK: sub w0, w0, w0, lsl #2
85 ; CHECK:neg w0, w0, lsl #2
[all …]
Darm64-patchpoint-webkit_jscc.ll13 ; CHECK-NEXT: movz x16, #0xffff, lsl #32
14 ; CHECK-NEXT: movk x16, #0xdead, lsl #16
21 ; FAST-NEXT: movz x16, #0xffff, lsl #32
22 ; FAST-NEXT: movk x16, #0xdead, lsl #16
44 ; CHECK-NEXT: movz x16, #0xffff, lsl #32
45 ; CHECK-NEXT: movk x16, #0xdead, lsl #16
57 ; FAST-NEXT: movz x16, #0xffff, lsl #32
58 ; FAST-NEXT: movk x16, #0xdead, lsl #16
82 ; CHECK-NEXT: movz x16, #0xffff, lsl #32
83 ; CHECK-NEXT: movk x16, #0xdead, lsl #16
[all …]
/external/llvm/test/CodeGen/ARM/
Dmul_const.ll6 ; CHECK: add r0, r0, r0, lsl #3
14 ; CHECK: rsb r0, r0, r0, lsl #3
22 ; CHECK: add r0, r0, r0, lsl #2
30 ; CHECK: add r0, r0, r0, lsl #1
38 ; CHECK: add r0, r0, r0, lsl #1
39 ; CHECK: lsl{{.*}}#12
47 ; CHECK: add r0, r0, r0, lsl #3
56 ; CHECK: sub r0, r0, r0, lsl #3
64 ; CHECK: add r0, r0, r0, lsl #2
73 ; CHECK: sub r0, r0, r0, lsl #2
[all …]
Dshifter_operand.ll8 ; A8: add r0, r0, r1, lsl r2
11 ; A9: add r0, r0, r1, lsl r2
34 ; A8: ldr r0, [r0, r2, lsl #2]
35 ; A8: ldr r1, [r1, r2, lsl #2]
37 ; lsl #2 is free
39 ; A9: ldr r0, [r0, r2, lsl #2]
40 ; A9: ldr r1, [r1, r2, lsl #2]
57 ; A8: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2]
58 ; A8-NOT: ldr [[REG:r[0-9]+]], [r0, r1, lsl #2]!
59 ; A8: str [[REG]], [r0, r1, lsl #2]
[all …]
/external/llvm/test/MC/ARM/
Darm-shift-encoding.s6 ldr r0, [r0, r0, lsl #0]
7 ldr r0, [r0, r0, lsl #16]
17 @ CHECK: ldr r0, [r0, r0, lsl #16] @ encoding: [0x00,0x08,0x90,0xe7]
26 pld [r0, r0, lsl #0]
27 pld [r0, r0, lsl #16]
37 @ CHECK: [r0, r0, lsl #16] @ encoding: [0x00,0xf8,0xd0,0xf7]
46 str r0, [r0, r0, lsl #0]
47 str r0, [r0, r0, lsl #16]
57 @ CHECK: str r0, [r0, r0, lsl #16] @ encoding: [0x00,0x08,0x80,0xe7]
70 str r6, [r7], r8, lsl #0
[all …]
/external/compiler-rt/lib/builtins/arm/
Dcomparesf2.S47 mov r2, r0, lsl #1
48 mov r3, r1, lsl #1
114 mov r2, r0, lsl #1
115 mov r3, r1, lsl #1
138 mov r2, r0, lsl #1
139 mov r3, r1, lsl #1
/external/libhevc/common/arm64/
Dihevc_inter_pred_chroma_vert_w16inp_w16out.s116 lsl x2,x2,#1 //src_strd = 2* src_strd
134 lsl x7,x2,#1 //2*src_strd
135 lsl x3,x3,#1 //2*dst_strd
136 lsl x9,x6,#2 //4*wd
137 sub x6,x3,x6,lsl #1 //2*dst_strd - 2*wd
166 add x1,x1,x6,lsl #1 //pu1_dst += 2*dst_strd - 2*wd
174 lsl x7,x2,#2 //2*src_strd
175 lsl x10,x3,#2 //2*dst_strd
177 sub x14,x10,x6,lsl #1 //2*dst_strd - 2*wd
178 sub x8,x7,x6,lsl #2 //2*src_strd - 4*wd
[all …]
/external/libhevc/common/arm/
Dihevc_deblk_luma_horz.s67 add r7,r3,r5,lsl #1
68 add r3,r3,r6,lsl #1
78 add r3,r3,r2,lsl #1
97 ldr r5,[r2,r7,lsl #2] @ beta
98 ldr r6,[r4,r3,lsl #2] @ tc
105 lsl r7,r6,#1
106 add r14,r1,r1,lsl #1
109 ldr r10,[r0,-r1,lsl #1] @-2 value
120 ldr r2,[r0,r1,lsl #1] @ 2 value
128 subs r9,r12,r9,lsl #1 @ dq0 value is stored in r9
[all …]
/external/libvpx/libvpx/vp9/common/arm/neon/
Dvp9_copy_neon.asm34 pld [r0, r1, lsl #1]
44 pld [r0, r1, lsl #1]
46 pld [r0, r1, lsl #1]
55 pld [r0, r1, lsl #1]
57 pld [r0, r1, lsl #1]
66 pld [r0, r1, lsl #1]
68 pld [r0, r1, lsl #1]

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