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/external/llvm/test/CodeGen/Mips/msa/
Dspecial.ll3 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | \
5 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \
7 ; RUN: llc -march=mips -mcpu=mips32r6 -mattr=+msa < %s | \
9 ; RUN: llc -march=mips64 -mcpu=mips64r6 -mattr=+msa < %s | \
Dllvm-stress-sz1-s742806235.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
D2r_vector_scalar.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | \
6 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | \
8 ; RUN: llc -march=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \
10 ; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \
Delm_move.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
Dllvm-stress-s2501752154-simplified.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
Dllvm-stress-s449609655-simplified.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
Dvecs10.ll3 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
Dllvm-stress-s2090927243-simplified.ll2 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s
D3rf_float_int.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
D3rf_exdo.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
D2rf_tq.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
Dendian.ll1 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck -check-prefix=BIGENDIAN %s
2 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck -check-prefix=LITENDIAN %s
D2rf_fq.ll4 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
5 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
Di10.ll3 ; RUN: llc -march=mips -mattr=+msa,+fp64 < %s | FileCheck %s
4 ; RUN: llc -march=mipsel -mattr=+msa,+fp64 < %s | FileCheck %s
/external/llvm/test/MC/Mips/
Dmips-reginfo-fp64.s1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa,+fp64 -filetype=obj -o - | \
5 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n32 -filetype=obj -o - …
9 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa,+fp64 -target-abi n64 -filetype=obj -o - …
/external/llvm/test/MC/Mips/msa/
Dset-msa-directive.s3 # CHECK: .set msa
13 .set msa define
Dabiflags.s1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -filetype=obj -o - | \
Dtest_2r_msa64.s1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
Dtest_elm_insert_msa64.s1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
Dtest_lsa.s1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32r2 -mattr=+msa -show-encoding | FileCheck %s
Dtest_elm_msa64.s1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | FileCheck %s
Dtest_dlsa.s1 # RUN: llvm-mc %s -arch=mips64 -mcpu=mips64r2 -mattr=+msa -show-encoding | \
/external/llvm/test/MC/Disassembler/Mips/msa/
Dtest_2r_msa64.txt1 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck…
Dtest_elm_insert_msa64.txt1 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck…
Dtest_elm_msa64.txt1 # RUN: llvm-mc --disassemble %s -triple=mips64-unknown-linux -mcpu=mips64r2 -mattr=+msa | FileCheck…

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