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Searched refs:muh (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/CodeGen/Mips/
Dmadd-msub.ll31 ; 32R6-DAG: muh $[[T5:[0-9]+]], ${{[45]}}, ${{[45]}}
114 ; 32R6-DAG: muh $[[T5:[0-9]+]], ${{[45]}}, ${{[45]}}
151 ; 32R6-DAG: muh $[[T0:[0-9]+]], ${{[45]}}, ${{[45]}}
237 ; 32R6-DAG: muh $[[T0:[0-9]+]], ${{[45]}}, ${{[45]}}
/external/v8/test/cctest/
Dtest-disasm-mips.cc153 COMPARE(muh(a0, a1, a2), in TEST()
157 COMPARE(muh(t1, t2, t3), in TEST()
161 COMPARE(muh(v0, v1, a0), in TEST()
Dtest-disasm-mips64.cc186 COMPARE(muh(a0, a1, a2), in TEST()
194 COMPARE(muh(a5, a6, a7), in TEST()
202 COMPARE(muh(v0, v1, a0), in TEST()
/external/llvm/test/MC/Disassembler/Mips/
Dmips32r6.txt94 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
Dmips64r6.txt103 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6.txt89 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
Dvalid-mips32r6-el.txt89 0xd8 0x10 0x64 0x00 # CHECK: muh $2, $3, $4
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt99 0xd8 0x10 0x64 0x00 # CHECK: muh $2, $3, $4
Dvalid-mips64r6.txt99 0x00 0x64 0x10 0xd8 # CHECK: muh $2, $3, $4
/external/v8/src/mips/
Dmacro-assembler-mips.cc676 muh(rd_hi, rs, rt.rm()); in Mul()
681 muh(rd_hi, rs, rt.rm()); in Mul()
696 muh(rd_hi, rs, at); in Mul()
701 muh(rd_hi, rs, at); in Mul()
714 muh(rd, rs, rt.rm()); in Mulh()
724 muh(rd, rs, at); in Mulh()
Dassembler-mips.h761 void muh(Register rd, Register rs, Register rt);
Dassembler-mips.cc1500 void Assembler::muh(Register rd, Register rs, Register rt) { in muh() function in v8::internal::Assembler
/external/v8/src/mips64/
Dassembler-mips64.h759 void muh(Register rd, Register rs, Register rt);
Dmacro-assembler-mips64.cc698 muh(rd, rs, rt.rm()); in Mulh()
708 muh(rd, rs, at); in Mulh()
Dassembler-mips64.cc1473 void Assembler::muh(Register rd, Register rs, Register rt) { in muh() function in v8::internal::Assembler
/external/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td461 class MUH_DESC : MUL_R6_DESC_BASE<"muh", GPR32Opnd, mulhs>;