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Searched refs:n16 (Results 1 – 25 of 64) sorted by relevance

123

/external/regex-re2/re2/
Dmake_unicode_groups.py27 n16 = 0 variable
70 global n16
72 n16 += len(range16)
101 print "// %d 16-bit ranges, %d 32-bit ranges" % (n16, n32)
/external/v8/test/cctest/compiler/
Dtest-scheduler.cc704 Node* n16 = graph.NewNode(op, nil, nil, nil); in TEST() local
705 USE(n16); in TEST()
778 n16->ReplaceInput(0, n15); in TEST()
779 n16->ReplaceInput(1, n15); in TEST()
780 n16->ReplaceInput(2, n10); in TEST()
781 n22->ReplaceInput(0, n16); in TEST()
858 Node* n16 = graph.NewNode(op, nil, nil, nil, nil); in TEST() local
859 USE(n16); in TEST()
860 n16->ReplaceInput(0, n8); in TEST()
864 n16->ReplaceInput(1, n5); in TEST()
[all …]
/external/llvm/test/CodeGen/NVPTX/
Dmodule-inline-asm.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dvector-global.ll3 target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
Dsext-params.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Drsqrt.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dload-sext-i1.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dbug22246.ll3 target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
Dadd-128bit.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Di1-global.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Di1-param.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dvec-param-load.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dldu-i8.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dfp-literals.ll4 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Di8-param.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dctpop.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dgeneric-to-nvvm.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dldu-reg-plus-offset.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dbug17709.ll4 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
Dsymbol-naming.ll16 target datalayout = "e-i64:64-v16:16-v32:32-n16:32:64"
Dbug21465.ll3 …16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"
/external/llvm/test/Analysis/Lint/
Daddress-spaces.ll3 target datalayout = "p32:32:32-p1:16:16:16-n16:32"
/external/llvm/test/CodeGen/Hexagon/
Dexpand-condsets-undef.ll4 target datalayout = "e-m:e-p:32:32-i64:64-a:0-v32:32-n16:32"
Dpacketize_cond_inst.ll3 …2:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"
Dhwloop-const.ll3 …2:32:32-i64:64:64-i32:32:32-i16:16:16-i1:32:32-f64:64:64-f32:32:32-v64:64:64-v32:32:32-a0:0-n16:32"

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