Searched refs:op_actions (Results 1 – 7 of 7) sorted by relevance
1055 bld_base->op_actions[TGSI_OPCODE_IABS].emit = build_tgsi_intrinsic_nomem; in radeon_llvm_context_init()1056 bld_base->op_actions[TGSI_OPCODE_IABS].intr_name = "llvm.AMDIL.abs."; in radeon_llvm_context_init()1057 bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not; in radeon_llvm_context_init()1058 bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and; in radeon_llvm_context_init()1059 bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor; in radeon_llvm_context_init()1060 bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or; in radeon_llvm_context_init()1061 bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd; in radeon_llvm_context_init()1062 bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv; in radeon_llvm_context_init()1063 bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv; in radeon_llvm_context_init()1064 bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod; in radeon_llvm_context_init()[all …]
782 bld_base->op_actions[TGSI_OPCODE_DP2] = dp2_action; in lp_set_default_actions()783 bld_base->op_actions[TGSI_OPCODE_DP3] = dp3_action; in lp_set_default_actions()784 bld_base->op_actions[TGSI_OPCODE_DP4] = dp4_action; in lp_set_default_actions()785 bld_base->op_actions[TGSI_OPCODE_DP2A] = dp2a_action; in lp_set_default_actions()786 bld_base->op_actions[TGSI_OPCODE_DPH] = dph_action; in lp_set_default_actions()787 bld_base->op_actions[TGSI_OPCODE_DST] = dst_action; in lp_set_default_actions()788 bld_base->op_actions[TGSI_OPCODE_EXP] = exp_action; in lp_set_default_actions()789 bld_base->op_actions[TGSI_OPCODE_LIT] = lit_action; in lp_set_default_actions()790 bld_base->op_actions[TGSI_OPCODE_LOG] = log_action; in lp_set_default_actions()791 bld_base->op_actions[TGSI_OPCODE_RSQ] = rsq_action; in lp_set_default_actions()[all …]
2106 bld.bld_base.op_actions[TGSI_OPCODE_BGNLOOP].emit = bgnloop_emit; in lp_build_tgsi_soa()2107 bld.bld_base.op_actions[TGSI_OPCODE_BGNSUB].emit = bgnsub_emit; in lp_build_tgsi_soa()2108 bld.bld_base.op_actions[TGSI_OPCODE_BRK].emit = brk_emit; in lp_build_tgsi_soa()2109 bld.bld_base.op_actions[TGSI_OPCODE_CAL].emit = cal_emit; in lp_build_tgsi_soa()2110 bld.bld_base.op_actions[TGSI_OPCODE_CONT].emit = cont_emit; in lp_build_tgsi_soa()2111 bld.bld_base.op_actions[TGSI_OPCODE_DDX].emit = ddx_emit; in lp_build_tgsi_soa()2112 bld.bld_base.op_actions[TGSI_OPCODE_DDY].emit = ddy_emit; in lp_build_tgsi_soa()2113 bld.bld_base.op_actions[TGSI_OPCODE_ELSE].emit = else_emit; in lp_build_tgsi_soa()2114 bld.bld_base.op_actions[TGSI_OPCODE_ENDIF].emit = endif_emit; in lp_build_tgsi_soa()2115 bld.bld_base.op_actions[TGSI_OPCODE_ENDLOOP].emit = endloop_emit; in lp_build_tgsi_soa()[all …]
116 struct lp_build_tgsi_action * action = &bld_base->op_actions[tgsi_opcode]; in lp_build_emit_llvm()196 &bld_base->op_actions[tgsi_opcode]; in lp_build_tgsi_inst_llvm()
304 struct lp_build_tgsi_action op_actions[TGSI_OPCODE_LAST]; member
231 bld_base->op_actions[TGSI_OPCODE_DP2] = dot_action; in r600_tgsi_llvm()232 bld_base->op_actions[TGSI_OPCODE_DP3] = dot_action; in r600_tgsi_llvm()233 bld_base->op_actions[TGSI_OPCODE_DP4] = dot_action; in r600_tgsi_llvm()234 bld_base->op_actions[TGSI_OPCODE_DPH] = dot_action; in r600_tgsi_llvm()235 bld_base->op_actions[TGSI_OPCODE_DDX].emit = llvm_emit_tex; in r600_tgsi_llvm()236 bld_base->op_actions[TGSI_OPCODE_DDY].emit = llvm_emit_tex; in r600_tgsi_llvm()237 bld_base->op_actions[TGSI_OPCODE_TEX].emit = llvm_emit_tex; in r600_tgsi_llvm()238 bld_base->op_actions[TGSI_OPCODE_TXB].emit = llvm_emit_tex; in r600_tgsi_llvm()239 bld_base->op_actions[TGSI_OPCODE_TXD].emit = llvm_emit_tex; in r600_tgsi_llvm()240 bld_base->op_actions[TGSI_OPCODE_TXL].emit = llvm_emit_tex; in r600_tgsi_llvm()[all …]
686 bld_base->op_actions[TGSI_OPCODE_TEX] = tex_action; in si_pipe_shader_create()687 bld_base->op_actions[TGSI_OPCODE_TXP] = tex_action; in si_pipe_shader_create()