/external/llvm/test/MC/Mips/ |
D | mips64-expansions.s | 9 # CHECK: ori $12, $zero, 1 # encoding: [0x01,0x00,0x0c,0x34] 10 # CHECK: ori $12, $zero, 10 # encoding: [0x0a,0x00,0x0c,0x34] 11 # CHECK: ori $12, $zero, 100 # encoding: [0x64,0x00,0x0c,0x34] 12 # CHECK: ori $12, $zero, 1000 # encoding: [0xe8,0x03,0x0c,0x34] 13 # CHECK: ori $12, $zero, 10000 # encoding: [0x10,0x27,0x0c,0x34] 15 # CHECK: ori $12, $12, 34464 # encoding: [0xa0,0x86,0x8c,0x35] 17 # CHECK: ori $12, $12, 16960 # encoding: [0x40,0x42,0x8c,0x35] 19 # CHECK: ori $12, $12, 38528 # encoding: [0x80,0x96,0x8c,0x35] 21 # CHECK: ori $12, $12, 57600 # encoding: [0x00,0xe1,0x8c,0x35] 23 # CHECK: ori $12, $12, 51712 # encoding: [0x00,0xca,0x8c,0x35] [all …]
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D | mips-expansions.s | 7 # CHECK: ori $5, $zero, 123 # encoding: [0x7b,0x00,0x05,0x34] 10 # CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] 15 # CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] 18 # CHECK: ori $7, $7, 2 # encoding: [0x02,0x00,0xe7,0x34] 22 # CHECK: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35] 27 # CHECK: ori $8, $8, %higher(symbol) # encoding: [A,A,0x08,0x35] 30 # CHECK: ori $8, $8, %hi(symbol) # encoding: [A,A,0x08,0x35] 33 # CHECK: ori $8, $8, %lo(symbol) # encoding: [A,A,0x08,0x35]
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D | micromips-expansions.s | 8 # CHECK: ori $5, $zero, 123 # encoding: [0xa0,0x50,0x7b,0x00] 11 # CHECK: ori $7, $7, 2 # encoding: [0xe7,0x50,0x02,0x00] 14 # CHECK: ori $7, $7, 2 # encoding: [0xe7,0x50,0x02,0x00] 17 # CHECK: ori $7, $7, 2 # encoding: [0xe7,0x50,0x02,0x00]
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D | mips-alu-instructions.s | 16 # CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34] 17 # CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34] 18 # CHECK: ori $11, $11, 128 # encoding: [0x80,0x00,0x6b,0x35] 48 ori $9, $6, 17767 49 ori $11, 128
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D | mips64-alu-instructions.s | 15 # CHECK: ori $4, $5, 17767 # encoding: [0x67,0x45,0xa4,0x34] 16 # CHECK: ori $9, $6, 17767 # encoding: [0x67,0x45,0xc9,0x34] 44 ori $9, $6, 17767
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D | micromips-alu-instructions.s | 30 # CHECK-EL: ori $9, $6, 17767 # encoding: [0x26,0x51,0x67,0x45] 67 # CHECK-EB: ori $9, $6, 17767 # encoding: [0x51,0x26,0x45,0x67] 102 ori $9, $6, 17767
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/external/valgrind/none/tests/mips64/ |
D | logical_instructions.stdout.exp | 3590 ori $t0, $t1, 0xff :: rt 0xff, rs 0x0, imm 0x00ff 3591 ori $t2, $t3, 0xffff :: rt 0xffff, rs 0x0, imm 0xffff 3592 ori $a0, $a1, 0x0 :: rt 0x0, rs 0x0, imm 0x0000 3593 ori $s0, $s1, 0x23 :: rt 0x23, rs 0x0, imm 0x0023 3594 ori $t0, $t1, 0xff :: rt 0x12bd6ff, rs 0x12bd6aa, imm 0x00ff 3595 ori $t2, $t3, 0xffff :: rt 0x12bffff, rs 0x12bd6aa, imm 0xffff 3596 ori $a0, $a1, 0x0 :: rt 0x12bd6aa, rs 0x12bd6aa, imm 0x0000 3597 ori $s0, $s1, 0x23 :: rt 0x12bd6ab, rs 0x12bd6aa, imm 0x0023 3598 ori $t0, $t1, 0xff :: rt 0xff, rs 0x0, imm 0x00ff 3599 ori $t2, $t3, 0xffff :: rt 0xffff, rs 0x0, imm 0xffff [all …]
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/external/llvm/test/CodeGen/Mips/Fast-ISel/ |
D | callabi.ll | 134 ; CHECK: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 17067 150 ; CHECK-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 21349 153 ; CHECK-DAG: ori $[[REG_FPCONST_3:[0-9]+]], $[[REG_FPCONST_2]], 24642 169 ; CHECK-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 33554 187 ; CHECK-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 16240 205 ; CHECK-DAG: ori $[[REG_FPCONST:[0-9]+]], $[[REG_FPCONST_1]], 14681 209 ; CHECK-DAG: ori $6, $[[REG_I_1]], 23475 211 ; CHECK-DAG: ori $7, $[[REG_I_2]], 45686 227 ; mips32-DAG: ori $[[REG_FPCONST_2:[0-9]+]], $[[REG_FPCONST_1]], 48037 229 ; mips32-DAG: ori $[[REG_FPCONST_4:[0-9]+]], $[[REG_FPCONST_3]], 63439 [all …]
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D | simplestorefp1.ll | 20 ; CHECK: ori $[[REG2:[0-9]+]], $[[REG1]], 46662 34 ; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 36 ; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951 43 ; mips32: ori $[[REG2a:[0-9]+]], $[[REG1a]], 49353 45 ; mips32: ori $[[REG2b:[0-9]+]], $[[REG1b]], 34951
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/external/llvm/test/MC/PowerPC/ |
D | ppc64-operands.s | 47 # CHECK-BE: ori 1, 2, 0 # encoding: [0x60,0x41,0x00,0x00] 48 # CHECK-LE: ori 1, 2, 0 # encoding: [0x00,0x00,0x41,0x60] 49 ori 1, 2, 0 51 # CHECK-BE: ori 1, 2, 65535 # encoding: [0x60,0x41,0xff,0xff] 52 # CHECK-LE: ori 1, 2, 65535 # encoding: [0xff,0xff,0x41,0x60] 53 ori 1, 2, 65535
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D | ppc64-errors.s | 40 # CHECK-NEXT: ori 1, 2, -1 41 ori 1, 2, -1 44 # CHECK-NEXT: ori 1, 2, 65536 45 ori 1, 2, 65536
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/external/llvm/test/CodeGen/Mips/msa/ |
D | frameindex.ll | 56 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 60 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 75 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 79 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 159 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 163 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 178 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 182 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 262 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 266 ; MIPS32-AE: ori [[R2:\$([0-9]+|gp)]], $zero, 32768 [all …]
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/external/llvm/test/CodeGen/Mips/ |
D | imm.ll | 7 ; CHECK: ori ${{[0-9]+}}, $[[R0]], 22136 15 ; CHECK-NOT: ori 36 ; CHECK: ori ${{[0-9]+}}, $zero, 33332
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D | mips64imm.ll | 8 ; CHECK-NOT: ori 23 ; CHECK: ori ${{[0-9]+}}, $zero, 33332
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D | i64arg.ll | 9 ; CHECK-DAG: ori $6, ${{[0-9]+}}, 3855 10 ; CHECK-DAG: ori $7, ${{[0-9]+}}, 22136
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/external/llvm/test/CodeGen/PowerPC/ |
D | 2010-02-12-saveCR.ll | 13 ; CHECK: ori [[T2]], [[T2]], 34540 17 ; CHECK: ori [[T3]], [[T3]], 34536 29 ; CHECK: ori [[T1]], [[T1]], 34536 34 ; CHECK: ori [[T1]], [[T1]], 34540
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D | Frames-large.ll | 17 ; PPC32-NOFP: ori r0, r0, 32736 27 ; PPC32-FP: ori r0, r0, 32736 38 ; PPC64-NOFP: ori r0, r0, 32720 48 ; PPC64-FP: ori r0, r0, 32704
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D | load-constant-addr.ll | 1 ; Should fold the ori into the lfs. 3 ; RUN: llc < %s -march=ppc32 | not grep ori
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D | bperm.ll | 64 ; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 3648 80 ; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 22861 107 ; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 35951 152 ; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 60527 171 ; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 4 192 ; CHECK-DAG: ori [[REG2:[0-9]+]], [[REG1]], 8183 193 ; CHECK-DAG: ori [[REG3:[0-9]+]], [[REG1]], 50017
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D | pwr7-gt-nop.ll | 21 ; CHECK: ori 2, 2, 0 24 ; CHECK: ori 2, 2, 0
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D | fast-isel-conversion.ll | 44 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524 49 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520 117 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524 122 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520 227 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524 232 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520 316 ; ELF64: ori {{[0-9]+}}, {{[0-9]+}}, 65524 321 ; ELF64LE: ori {{[0-9]+}}, {{[0-9]+}}, 65520
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/external/flac/libFLAC/ppc/as/ |
D | lpc_asm.s | 72 ori r31,r31,lo16(0xfffffc00) 119 ori r31,r31,lo16(L1307) 133 ori r31,r31,lo16(L1306) 147 ori r31,r31,lo16(L1305) 161 ori r31,r31,lo16(L1304) 175 ori r31,r31,lo16(L1303) 189 ori r31,r31,lo16(L1302) 203 ori r31,r31,lo16(L1301) 215 ori r31,r31,lo16(L1300) 321 ori r31,r31,lo16(0xffc00000) [all …]
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/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | ret.ll | 94 ; ALL-DAG: ori $2, $[[T0]], 1 106 ; GPR32-DAG: ori $3, $[[T0]], 1 121 ; GPR32-DAG: ori $2, $[[T0]], 1 137 ; GPR32-DAG: ori $2, $[[T0]], 1 138 ; GPR32-DAG: ori $3, $[[T1]], 2 140 ; GPR64-DAG: ori $[[T0:[0-9]+]], $zero, 32769
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/external/llvm/test/MC/Mips/msa/ |
D | test_i8.s | 8 # CHECK: ori.b $w26, $w20, 135 # encoding: [0x79,0x87,0xa6,0x80] 19 ori.b $w26, $w20, 135
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-operands.txt | 27 # CHECK: ori 1, 2, 0 30 # CHECK: ori 1, 2, 65535
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