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/external/llvm/test/MC/SystemZ/
Dinsn-good-z196.s4 #CHECK: aghik %r0, %r0, -32768 # encoding: [0xec,0x00,0x80,0x00,0x00,0xd9]
5 #CHECK: aghik %r0, %r0, -1 # encoding: [0xec,0x00,0xff,0xff,0x00,0xd9]
6 #CHECK: aghik %r0, %r0, 0 # encoding: [0xec,0x00,0x00,0x00,0x00,0xd9]
7 #CHECK: aghik %r0, %r0, 1 # encoding: [0xec,0x00,0x00,0x01,0x00,0xd9]
8 #CHECK: aghik %r0, %r0, 32767 # encoding: [0xec,0x00,0x7f,0xff,0x00,0xd9]
9 #CHECK: aghik %r0, %r15, 0 # encoding: [0xec,0x0f,0x00,0x00,0x00,0xd9]
10 #CHECK: aghik %r15, %r0, 0 # encoding: [0xec,0xf0,0x00,0x00,0x00,0xd9]
13 aghik %r0, %r0, -32768
14 aghik %r0, %r0, -1
15 aghik %r0, %r0, 0
[all …]
Dinsn-bad-z196.s6 #CHECK: aghik %r0, %r1, -32769
8 #CHECK: aghik %r0, %r1, 32768
10 #CHECK: aghik %r0, %r1, foo
12 aghik %r0, %r1, -32769
13 aghik %r0, %r1, 32768
14 aghik %r0, %r1, foo
17 #CHECK: ahik %r0, %r1, -32769
19 #CHECK: ahik %r0, %r1, 32768
21 #CHECK: ahik %r0, %r1, foo
23 ahik %r0, %r1, -32769
[all …]
Dinsn-bad.s6 #CHECK: a %r0, -1
8 #CHECK: a %r0, 4096
10 a %r0, -1
11 a %r0, 4096
30 #CHECK: afi %r0, (-1 << 31) - 1
32 #CHECK: afi %r0, (1 << 31)
34 afi %r0, (-1 << 31) - 1
35 afi %r0, (1 << 31)
38 #CHECK: ag %r0, -524289
40 #CHECK: ag %r0, 524288
[all …]
Dinsn-good.s4 #CHECK: a %r0, 0 # encoding: [0x5a,0x00,0x00,0x00]
5 #CHECK: a %r0, 4095 # encoding: [0x5a,0x00,0x0f,0xff]
6 #CHECK: a %r0, 0(%r1) # encoding: [0x5a,0x00,0x10,0x00]
7 #CHECK: a %r0, 0(%r15) # encoding: [0x5a,0x00,0xf0,0x00]
8 #CHECK: a %r0, 4095(%r1,%r15) # encoding: [0x5a,0x01,0xff,0xff]
9 #CHECK: a %r0, 4095(%r15,%r1) # encoding: [0x5a,0x0f,0x1f,0xff]
12 a %r0, 0
13 a %r0, 4095
14 a %r0, 0(%r1)
15 a %r0, 0(%r15)
[all …]
Dinsn-good-zEC12.s4 #CHECK: etnd %r0 # encoding: [0xb2,0xec,0x00,0x00]
8 etnd %r0
12 #CHECK: ntstg %r0, -524288 # encoding: [0xe3,0x00,0x00,0x00,0x80,0x25]
13 #CHECK: ntstg %r0, -1 # encoding: [0xe3,0x00,0x0f,0xff,0xff,0x25]
14 #CHECK: ntstg %r0, 0 # encoding: [0xe3,0x00,0x00,0x00,0x00,0x25]
15 #CHECK: ntstg %r0, 1 # encoding: [0xe3,0x00,0x00,0x01,0x00,0x25]
16 #CHECK: ntstg %r0, 524287 # encoding: [0xe3,0x00,0x0f,0xff,0x7f,0x25]
17 #CHECK: ntstg %r0, 0(%r1) # encoding: [0xe3,0x00,0x10,0x00,0x00,0x25]
18 #CHECK: ntstg %r0, 0(%r15) # encoding: [0xe3,0x00,0xf0,0x00,0x00,0x25]
19 #CHECK: ntstg %r0, 524287(%r1,%r15) # encoding: [0xe3,0x01,0xff,0xff,0x7f,0x25]
[all …]
Dinsn-bad-zEC12.s6 #CHECK: ntstg %r0, -524289
8 #CHECK: ntstg %r0, 524288
10 ntstg %r0, -524289
11 ntstg %r0, 524288
14 #CHECK: ppa %r0, %r0, -1
16 #CHECK: ppa %r0, %r0, 16
18 ppa %r0, %r0, -1
19 ppa %r0, %r0, 16
22 #CHECK: risbgn %r0,%r0,0,0,-1
24 #CHECK: risbgn %r0,%r0,0,0,64
[all …]
/external/valgrind/none/tests/arm/
Dv6media.c152 TESTINST3("mul r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
153 TESTINST3("mul r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0); in main()
154 TESTINST3("mul r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0); in main()
155 TESTINST3("mul r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0); in main()
156 TESTINST3("mul r0, r1, r2", 0x7fffffff, 0x7fffffff, r0, r1, r2, 0); in main()
157 TESTINST3("mul r0, r1, r2", 0x0000ffff, 0x0000ffff, r0, r1, r2, 0); in main()
161 TESTINST3("muls r0, r1, r2", 0, 0, r0, r1, r2, 0); in main()
162 TESTINST3("muls r0, r1, r2", 0xffffffff, 0, r0, r1, r2, 0); in main()
163 TESTINST3("muls r0, r1, r2", 0, 0xffffffff, r0, r1, r2, 0); in main()
164 TESTINST3("muls r0, r1, r2", 0xffffffff, 0xffffffff, r0, r1, r2, 0); in main()
[all …]
Dv6intARM.c144 TESTINST2("mov r0, r1", 1, r0, r1, 0); in main()
145 TESTINST2("cpy r0, r1", 1, r0, r1, 0); in main()
146 TESTINST2("mov r0, #0", 0, r0, r1, 0); in main()
147 TESTINST2("mov r0, #1", 0, r0, r1, 0); in main()
149 TESTINST2("movs r0, r1", 1, r0, r1, c); in main()
150 TESTINST2("movs r0, r1", 0, r0, r1, c); in main()
151 TESTINST2("movs r0, r1", 0x80000000, r0, r1, c); in main()
152 TESTINST2("movs r0, #0", 0, r0, r1, c); in main()
153 TESTINST2("movs r0, #1", 0, r0, r1, c); in main()
157 TESTINST2("mvn r0, r1", 1, r0, r1, 0); in main()
[all …]
/external/llvm/test/MC/ARM/
Darm-shift-encoding.s3 ldr r0, [r0, r0]
4 ldr r0, [r0, r0, lsr #32]
5 ldr r0, [r0, r0, lsr #16]
6 ldr r0, [r0, r0, lsl #0]
7 ldr r0, [r0, r0, lsl #16]
8 ldr r0, [r0, r0, asr #32]
9 ldr r0, [r0, r0, asr #16]
10 ldr r0, [r0, r0, rrx]
11 ldr r0, [r0, r0, ror #16]
13 @ CHECK: ldr r0, [r0, r0] @ encoding: [0x00,0x00,0x90,0xe7]
[all …]
Dthumb_rewrites.s3 adds r0, r0, #8
4 @ CHECK: adds r0, #8 @ encoding: [0x08,0x30]
6 adds r0, r0, r0
7 @ CHECK: adds r0, r0, r0 @ encoding: [0x00,0x18]
9 add r0, r0, r8
10 @ CHECK: add r0, r8 @ encoding: [0x40,0x44]
12 add sp, sp, r0
13 @ CHECK: add sp, r0 @ encoding: [0x85,0x44]
15 add r0, r0, r1
16 @ CHECK: add r0, r1 @ encoding: [0x08,0x44]
[all …]
Dneont2-vld-encoding.s5 @ CHECK: vld1.8 {d16}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x07]
6 vld1.8 {d16}, [r0:64]
7 @ CHECK: vld1.16 {d16}, [r0] @ encoding: [0x60,0xf9,0x4f,0x07]
8 vld1.16 {d16}, [r0]
9 @ CHECK: vld1.32 {d16}, [r0] @ encoding: [0x60,0xf9,0x8f,0x07]
10 vld1.32 {d16}, [r0]
11 @ CHECK: vld1.64 {d16}, [r0] @ encoding: [0x60,0xf9,0xcf,0x07]
12 vld1.64 {d16}, [r0]
13 @ CHECK: vld1.8 {d16, d17}, [r0:64] @ encoding: [0x60,0xf9,0x1f,0x0a]
14 vld1.8 {d16, d17}, [r0:64]
[all …]
Dldr-pseudo.s18 ldr r0, =0x10001
19 @ CHECK: ldr r0, .Ltmp[[TMP0:[0-9]+]]
25 ldr r0, =0x10002
26 @ CHECK: ldr r0, .Ltmp[[TMP1:[0-9]+]]
27 adds r0, r0, #1
28 adds r0, r0, #1
29 adds r0, r0, #1
30 adds r0, r0, #1
31 ldr r0, =0x10003
32 @ CHECK: ldr r0, .Ltmp[[TMP2:[0-9]+]]
[all …]
Dldr-pseudo-darwin.s18 ldr r0, =0x10001
19 @ CHECK: ldr r0, Ltmp0
25 ldr r0, =0x10002
26 @ CHECK: ldr r0, Ltmp1
27 adds r0, r0, #1
28 adds r0, r0, #1
29 adds r0, r0, #1
30 adds r0, r0, #1
31 ldr r0, =0x10003
32 @ CHECK: ldr r0, Ltmp2
[all …]
Dneont2-vst-encoding.s5 @ CHECK: vst1.8 {d16}, [r0:64] @ encoding: [0x40,0xf9,0x1f,0x07]
6 vst1.8 {d16}, [r0:64]
7 @ CHECK: vst1.16 {d16}, [r0] @ encoding: [0x40,0xf9,0x4f,0x07]
8 vst1.16 {d16}, [r0]
9 @ CHECK: vst1.32 {d16}, [r0] @ encoding: [0x40,0xf9,0x8f,0x07]
10 vst1.32 {d16}, [r0]
11 @ CHECK: vst1.64 {d16}, [r0] @ encoding: [0x40,0xf9,0xcf,0x07]
12 vst1.64 {d16}, [r0]
13 @ CHECK: vst1.8 {d16, d17}, [r0:64] @ encoding: [0x40,0xf9,0x1f,0x0a]
14 vst1.8 {d16, d17}, [r0:64]
[all …]
Dthumb2-mclass.s13 mrs r0, apsr
14 mrs r0, iapsr
15 mrs r0, eapsr
16 mrs r0, xpsr
17 mrs r0, ipsr
18 mrs r0, epsr
19 mrs r0, iepsr
20 mrs r0, msp
21 mrs r0, psp
22 mrs r0, primask
[all …]
Dltorg.s15 ldr r0, =0x10001
16 @ CHECK: ldr r0, .Ltmp[[TMP0:[0-9+]]]
17 adds r0, r0, #1
18 adds r0, r0, #1
28 adds r0, r0, #1
29 adds r0, r0, #1
35 ldr r0, =0x10002
36 @ CHECK: ldr r0, .Ltmp[[TMP1:[0-9+]]]
37 adds r0, r0, #1
38 adds r0, r0, #1
[all …]
Dltorg-darwin.s15 ldr r0, =0x10001
16 @ CHECK: ldr r0, Ltmp0
17 adds r0, r0, #1
18 adds r0, r0, #1
30 adds r0, r0, #1
31 adds r0, r0, #1
37 ldr r0, =0x10002
38 @ CHECK: ldr r0, Ltmp1
39 adds r0, r0, #1
40 adds r0, r0, #1
[all …]
Darm_addrmode2.s4 @ CHECK: ldrt r1, [r0], r2 @ encoding: [0x02,0x10,0xb0,0xe6]
5 @ CHECK: ldrt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xb0,0xe6]
6 @ CHECK: ldrt r1, [r0], #4 @ encoding: [0x04,0x10,0xb0,0xe4]
7 @ CHECK: ldrt r1, [r0], #0 @ encoding: [0x00,0x10,0xb0,0xe4]
8 @ CHECK: ldrbt r1, [r0], r2 @ encoding: [0x02,0x10,0xf0,0xe6]
9 @ CHECK: ldrbt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xf0,0xe6]
10 @ CHECK: ldrbt r1, [r0], #4 @ encoding: [0x04,0x10,0xf0,0xe4]
11 @ CHECK: ldrbt r1, [r0], #0 @ encoding: [0x00,0x10,0xf0,0xe4]
12 @ CHECK: strt r1, [r0], r2 @ encoding: [0x02,0x10,0xa0,0xe6]
13 @ CHECK: strt r1, [r0], r2, lsr #3 @ encoding: [0xa2,0x11,0xa0,0xe6]
[all …]
Dv8_IT_manual.s163 lslge r7, r0, #1
171 lslge r7, r0
241 tstge r7, r0
250 rsbge r1, r0, #0
254 rsbge r11, r0, #0
320 ldrge r0, [r1, r2]
328 ldrge r0, [r1]
331 ldrge r0, [r1, #8]
335 ldrge r0, [sp]
338 ldrge r0, [sp, #8]
[all …]
/external/webrtc/src/common_audio/signal_processing/
Dspl_sqrt_floor.s7 @ Input : r0 32 bit unsigned integer
8 @ Output: r0 = INT (SQRT (r0)), precision is 16 bits
21 cmp r0, r2, ror #2 * 0
22 subhs r0, r0, r2, ror #2 * 0
25 cmp r0, r2, ror #2 * 1
26 subhs r0, r0, r2, ror #2 * 1
29 cmp r0, r2, ror #2 * 2
30 subhs r0, r0, r2, ror #2 * 2
33 cmp r0, r2, ror #2 * 3
34 subhs r0, r0, r2, ror #2 * 3
[all …]
/external/llvm/test/CodeGen/ARM/
Dfast-isel-intrinsic.ll17 ; ARM: {{(movw r0, :lower16:_?message1)|(ldr r0, .LCPI)}}
18 ; ARM: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
19 ; ARM: add r0, r0, #5
30 ; THUMB: {{(movw r0, :lower16:_?message1)|(ldr.n r0, .LCPI)}}
31 ; THUMB: {{(movt r0, :upper16:_?message1)|(ldr r0, \[r0\])}}
32 ; THUMB: adds r0, #5
50 ; ARM: {{(movw r0, :lower16:L_temp\$non_lazy_ptr)|(ldr r0, .LCPI)}}
51 ; ARM: {{(movt r0, :upper16:L_temp\$non_lazy_ptr)?}}
52 ; ARM: ldr r0, [r0]
53 ; ARM: add r1, r0, #4
[all …]
Dfast-isel-ext.ll21 ; v7: and r0, r0, #1
23 ; prev6: and r0, r0, #1
30 ; v7: and r0, r0, #1
32 ; prev6: and r0, r0, #1
39 ; v7: and r0, r0, #1
41 ; prev6: and r0, r0, #1
48 ; v7: and r0, r0, #255
50 ; prev6: and r0, r0, #255
57 ; v7: and r0, r0, #255
59 ; prev6: and r0, r0, #255
[all …]
/external/mesa3d/src/gallium/state_trackers/d3d1x/progs/d3d11spikysphere/
Dd3d11spikysphere.hlsl.ds.h73 add r0.x, cb0[8].x, l(1.000000)
74 mul r0.yzw, vDomain.yyyy, vicp[1][0].yyzx
75 mad r0.yzw, vicp[0][0].yyzx, vDomain.xxxx, r0.yyzw
76 mad r0.yzw, vicp[2][0].yyzx, vDomain.zzzz, r0.yyzw
77 dp3 r1.x, r0.yzwy, r0.yzwy
79 mul r0.yzw, r0.yyzw, r1.xxxx
80 mul r1.xyz, r0.wyzw, cb0[8].yyyy
90 mul r2.xyz, r0.wyzw, r1.wwww
91 div r2.xyz, r2.xyzx, r0.xxxx
102 lt r0.x, |r0.y|, |r0.w|
[all …]
/external/llvm/test/MC/Disassembler/SystemZ/
Dinsns.txt70 # CHECK: afi %r0, -2147483648
73 # CHECK: afi %r0, -1
76 # CHECK: afi %r0, 0
79 # CHECK: afi %r0, 1
82 # CHECK: afi %r0, 2147483647
88 # CHECK: agfi %r0, -2147483648
91 # CHECK: agfi %r0, -1
94 # CHECK: agfi %r0, 0
97 # CHECK: agfi %r0, 1
100 # CHECK: agfi %r0, 2147483647
[all …]
/external/mesa3d/src/gallium/state_trackers/d3d1x/progs/d3d11gears/
Dd3d11gears.hlsl.ps.h55 dp3 r0.x, v2.xyzx, v2.xyzx
56 rsq r0.x, r0.x
57 dp3 r0.y, v3.xyzx, v3.xyzx
58 rsq r0.y, r0.y
59 mul r0.yzw, r0.yyyy, v3.xxyz
60 mad r1.xyz, v2.xyzx, r0.xxxx, r0.yzwy
61 dp3 r0.x, r1.xyzx, r1.xyzx
62 rsq r0.x, r0.x
63 mul r1.xyz, r0.xxxx, r1.xyzx
64 dp3 r0.x, v1.xyzx, v1.xyzx
[all …]

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