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Searched refs:res12 (Results 1 – 11 of 11) sorted by relevance

/external/llvm/test/CodeGen/R600/
Dllvm.SI.resinfo.ll34 %res12 = call <4 x i32> @llvm.SI.resinfo(i32 %a12, <32 x i8> undef, i32 12)
66 %t16 = extractelement <4 x i32> %res12, i32 0
67 %t17 = extractelement <4 x i32> %res12, i32 1
68 %t18 = extractelement <4 x i32> %res12, i32 3
Dllvm.SI.sampled.ll60 %res12 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v12,
97 %t16 = extractelement <4 x float> %res12, i32 0
98 %t17 = extractelement <4 x float> %res12, i32 1
99 %t18 = extractelement <4 x float> %res12, i32 3
Dllvm.SI.sample.ll60 %res12 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v12,
97 %t16 = extractelement <4 x float> %res12, i32 0
98 %t17 = extractelement <4 x float> %res12, i32 1
99 %t18 = extractelement <4 x float> %res12, i32 3
Dllvm.AMDGPU.tex.ll33 %res12 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res11, i32 0, i32 0, i32 12)
34 %res13 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res12, i32 0, i32 0, i32 13)
Dfetch-limits.r700+.ll50 %res12 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %12, i32 0, i32 0, i32 1)
61 %g = fadd <4 x float> %res12, %res13
/external/llvm/test/Bitcode/
DmiscInstructions.3.2.ll102 ; CHECK-NEXT: %res12 = icmp eq <2 x i32> %vec1, %vec2
103 %res12 = icmp eq <2 x i32> %vec1, %vec2
144 ; CHECK-NEXT: %res12 = fcmp ueq float %x1, %x2
145 %res12 = fcmp ueq float %x1, %x2
DmemInstructions.3.2.ll63 ; CHECK-NEXT: %res12 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
64 %res12 = load volatile i8, i8* %ptr1, align 1, !invariant.load !1
119 ; CHECK-NEXT: %res12 = load atomic i8, i8* %ptr1 singlethread seq_cst, align 1
120 %res12 = load atomic i8, i8* %ptr1 singlethread seq_cst, align 1
274 ; CHECK-NEXT: %res12 = extractvalue { i32, i1 } [[TMP]], 0
275 %res12 = cmpxchg volatile i32* %ptr, i32 %cmp, i32 %new singlethread release monotonic
/external/clang/test/SemaCXX/
Daltivec.cpp31 int res12[vec_step(vf) == 4 ? 1 : -1]; in test_vec_step() local
/external/clang/test/SemaOpenCL/
Dvec_step.cl27 int res12[vec_step(void) == 1 ? 1 : -1];
/external/mesa3d/src/gallium/drivers/llvmpipe/
Dlp_state_setup.c251 LLVMValueRef max, max_value, res12; in lp_do_offset_tri() local
281 res12 = LLVMBuildFSub(b, dyzzx01_dzxyz20, dzx01_dyz20, "res12"); in lp_do_offset_tri()
285 dzdxdzdy = LLVMBuildFMul(b, res12, inv_det, "dzdxdzdy"); in lp_do_offset_tri()
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_dct_sse2.c1357 __m128i res08, res09, res10, res11, res12, res13, res14, res15; in vp9_fdct16x16_sse2() local
1520 res12 = _mm_packs_epi32(w6, w7); in vp9_fdct16x16_sse2()
1871 const __m128i tr0_4 = _mm_unpacklo_epi16(res12, res13); in vp9_fdct16x16_sse2()
1873 const __m128i tr0_6 = _mm_unpackhi_epi16(res12, res13); in vp9_fdct16x16_sse2()