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Searched refs:res15 (Results 1 – 10 of 10) sorted by relevance

/external/llvm/test/CodeGen/R600/
Dllvm.SI.resinfo.ll37 %res15 = call <4 x i32> @llvm.SI.resinfo(i32 %a15, <32 x i8> undef, i32 15)
81 %t28 = extractelement <4 x i32> %res15, i32 0
82 %t29 = extractelement <4 x i32> %res15, i32 1
83 %t30 = extractelement <4 x i32> %res15, i32 2
84 %t31 = extractelement <4 x i32> %res15, i32 3
Dllvm.SI.imageload.ll42 %res15 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v15,
64 %t28 = extractelement <4 x i32> %res15, i32 0
65 %t29 = extractelement <4 x i32> %res15, i32 1
66 %t30 = extractelement <4 x i32> %res15, i32 2
67 %t31 = extractelement <4 x i32> %res15, i32 3
Dllvm.SI.sampled.ll66 %res15 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v15,
112 %t28 = extractelement <4 x float> %res15, i32 0
113 %t29 = extractelement <4 x float> %res15, i32 1
114 %t30 = extractelement <4 x float> %res15, i32 2
115 %t31 = extractelement <4 x float> %res15, i32 3
Dllvm.SI.sample.ll66 %res15 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v15,
112 %t28 = extractelement <4 x float> %res15, i32 0
113 %t29 = extractelement <4 x float> %res15, i32 1
114 %t30 = extractelement <4 x float> %res15, i32 2
115 %t31 = extractelement <4 x float> %res15, i32 3
Dllvm.AMDGPU.tex.ll36 %res15 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res14, i32 0, i32 0, i32 15)
37 %res16 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res15, i32 0, i32 0, i32 16)
Dfetch-limits.r700+.ll53 %res15 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %15, i32 0, i32 0, i32 1)
62 %h = fadd <4 x float> %res14, %res15
/external/llvm/test/Bitcode/
DmemInstructions.3.2.ll72 ; CHECK-NEXT: %res15 = load i8, i8* %ptr1, align 1, {{[(!nontemporal !0, !invariant.load !1) | (!in…
73 %res15 = load i8, i8* %ptr1, align 1, !nontemporal !0, !invariant.load !1
128 ; CHECK-NEXT: %res15 = load atomic volatile i8, i8* %ptr1 singlethread acquire, align 1
129 %res15 = load atomic volatile i8, i8* %ptr1 singlethread acquire, align 1
287 ; CHECK-NEXT: %res15 = extractvalue { i32, i1 } [[TMP]], 0
288 %res15 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acq_rel acquire
DmiscInstructions.3.2.ll153 ; CHECK-NEXT: %res15 = fcmp true float %x1, %x2
154 %res15 = fcmp true float %x1, %x2
/external/clang/test/SemaOpenCL/
Dvec_step.cl31 …int res15 = vec_step(void(void)); // expected-error {{'vec_step' requires built-in scalar or vecto…
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_dct_sse2.c1357 __m128i res08, res09, res10, res11, res12, res13, res14, res15; in vp9_fdct16x16_sse2() local
1787 res15 = _mm_packs_epi32(w0, w1); in vp9_fdct16x16_sse2()
1872 const __m128i tr0_5 = _mm_unpacklo_epi16(res14, res15); in vp9_fdct16x16_sse2()
1874 const __m128i tr0_7 = _mm_unpackhi_epi16(res14, res15); in vp9_fdct16x16_sse2()