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Searched refs:res7 (Results 1 – 18 of 18) sorted by relevance

/external/llvm/test/CodeGen/X86/
Davx512bw-intrinsics.ll91 %res7 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i8 7, i64 -1)
92 %vec7 = insertelement <8 x i64> %vec6, i64 %res7, i32 7
120 %res7 = call i64 @llvm.x86.avx512.mask.cmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i8 7, i64 %mask)
121 %vec7 = insertelement <8 x i64> %vec6, i64 %res7, i32 7
151 %res7 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i8 7, i64 -1)
152 %vec7 = insertelement <8 x i64> %vec6, i64 %res7, i32 7
180 %res7 = call i64 @llvm.x86.avx512.mask.ucmp.b.512(<64 x i8> %a0, <64 x i8> %a1, i8 7, i64 %mask)
181 %vec7 = insertelement <8 x i64> %vec6, i64 %res7, i32 7
211 %res7 = call i32 @llvm.x86.avx512.mask.cmp.w.512(<32 x i16> %a0, <32 x i16> %a1, i8 7, i32 -1)
212 %vec7 = insertelement <8 x i32> %vec6, i32 %res7, i32 7
[all …]
Davx512vl-intrinsics.ll93 %res7 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i8 7, i8 -1)
94 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
122 %res7 = call i8 @llvm.x86.avx512.mask.cmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i8 7, i8 %mask)
123 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
153 %res7 = call i8 @llvm.x86.avx512.mask.ucmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i8 7, i8 -1)
154 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
182 %res7 = call i8 @llvm.x86.avx512.mask.ucmp.d.256(<8 x i32> %a0, <8 x i32> %a1, i8 7, i8 %mask)
183 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
213 %res7 = call i8 @llvm.x86.avx512.mask.cmp.q.256(<4 x i64> %a0, <4 x i64> %a1, i8 7, i8 -1)
214 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
[all …]
Davx512bwvl-intrinsics.ll93 %res7 = call i32 @llvm.x86.avx512.mask.cmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i8 7, i32 -1)
94 %vec7 = insertelement <8 x i32> %vec6, i32 %res7, i32 7
122 %res7 = call i32 @llvm.x86.avx512.mask.cmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i8 7, i32 %mask)
123 %vec7 = insertelement <8 x i32> %vec6, i32 %res7, i32 7
153 %res7 = call i32 @llvm.x86.avx512.mask.ucmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i8 7, i32 -1)
154 %vec7 = insertelement <8 x i32> %vec6, i32 %res7, i32 7
182 %res7 = call i32 @llvm.x86.avx512.mask.ucmp.b.256(<32 x i8> %a0, <32 x i8> %a1, i8 7, i32 %mask)
183 %vec7 = insertelement <8 x i32> %vec6, i32 %res7, i32 7
213 %res7 = call i16 @llvm.x86.avx512.mask.cmp.w.256(<16 x i16> %a0, <16 x i16> %a1, i8 7, i16 -1)
214 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
[all …]
Davx512-intrinsics.ll760 %res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i8 7, i16 -1)
761 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
789 %res7 = call i16 @llvm.x86.avx512.mask.cmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i8 7, i16 %mask)
790 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
820 %res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i8 7, i16 -1)
821 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
849 %res7 = call i16 @llvm.x86.avx512.mask.ucmp.d.512(<16 x i32> %a0, <16 x i32> %a1, i8 7, i16 %mask)
850 %vec7 = insertelement <8 x i16> %vec6, i16 %res7, i32 7
880 %res7 = call i8 @llvm.x86.avx512.mask.cmp.q.512(<8 x i64> %a0, <8 x i64> %a1, i8 7, i8 -1)
881 %vec7 = insertelement <8 x i8> %vec6, i8 %res7, i32 7
[all …]
/external/llvm/test/Bitcode/
DmiscInstructions.3.2.ll87 ; CHECK-NEXT: %res7 = icmp sgt i32 %x1, %x2
88 %res7 = icmp sgt i32 %x1, %x2
129 ; CHECK-NEXT: %res7 = fcmp ogt float %x1, %x2
130 %res7 = fcmp ogt float %x1, %x2
DmemInstructions.3.2.ll48 ; CHECK-NEXT: %res7 = load i8, i8* %ptr1, align 1, !nontemporal !0
49 %res7 = load i8, i8* %ptr1, align 1, !nontemporal !0
104 ; CHECK-NEXT: %res7 = load atomic volatile i8, i8* %ptr1 acquire, align 1
105 %res7 = load atomic volatile i8, i8* %ptr1 acquire, align 1
253 ; CHECK-NEXT: %res7 = extractvalue { i32, i1 } [[TMP]], 0
254 %res7 = cmpxchg i32* %ptr, i32 %cmp, i32 %new singlethread acquire acquire
DbinaryIntInstructions.3.2.ll28 ; CHECK: %res7 = add nsw i1 %x1, %x1
29 %res7 = add nsw i1 %x1, %x1
/external/llvm/test/CodeGen/R600/
Dfetch-limits.r600.ll28 %res7 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 0, i32 0, i32 1)
33 %d = fadd <4 x float> %res6, %res7
Dllvm.SI.resinfo.ll29 %res7 = call <4 x i32> @llvm.SI.resinfo(i32 %a7, <32 x i8> undef, i32 7)
49 %t4 = extractelement <4 x i32> %res7, i32 0
50 %t5 = extractelement <4 x i32> %res7, i32 3
Dllvm.AMDGPU.tex.ll28 %res7 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res6, i32 0, i32 0, i32 7)
29 %res8 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %res7, i32 0, i32 0, i32 8)
Dllvm.SI.sampled.ll50 %res7 = call <4 x float> @llvm.SI.sampled.(<4 x i32> %v7,
80 %t4 = extractelement <4 x float> %res7, i32 0
81 %t5 = extractelement <4 x float> %res7, i32 3
Dllvm.SI.sample.ll50 %res7 = call <4 x float> @llvm.SI.sample.(<4 x i32> %v7,
80 %t4 = extractelement <4 x float> %res7, i32 0
81 %t5 = extractelement <4 x float> %res7, i32 3
Dfetch-limits.r700+.ll45 %res7 = call <4 x float> @llvm.AMDGPU.tex(<4 x float> %7, i32 0, i32 0, i32 1)
58 %d = fadd <4 x float> %res6, %res7
/external/clang/test/SemaCXX/
Daltivec.cpp26 int res7[vec_step(vus) == 8 ? 1 : -1]; in test_vec_step() local
/external/llvm/test/CodeGen/ARM/
Dintrinsics-crypto.ll35 %res7 = call <4 x i32> @llvm.arm.neon.sha256h(<4 x i32> %res6, <4 x i32> %tmp3, <4 x i32> %res1)
37 %res8 = call <4 x i32> @llvm.arm.neon.sha256h2(<4 x i32> %res7, <4 x i32> %tmp3, <4 x i32> %res1)
/external/clang/test/SemaOpenCL/
Dvec_step.cl22 int res7[vec_step(int2) == 2 ? 1 : -1];
/external/clang/test/SemaObjCXX/
Darc-templates.mm136 identity<__unsafe_unretained id> res7 = accept_any_ref(ui);
156 identity<__unsafe_unretained A *> res7 = accept_any_ref(ui);
/external/libvpx/libvpx/vp9/encoder/x86/
Dvp9_dct_sse2.c489 __m128i res0, res1, res2, res3, res4, res5, res6, res7; in vp9_fdct8x8_sse2() local
600 res7 = _mm_packs_epi32(w2, w3); in vp9_fdct8x8_sse2()
619 const __m128i tr0_5 = _mm_unpacklo_epi16(res6, res7); in vp9_fdct8x8_sse2()
621 const __m128i tr0_7 = _mm_unpackhi_epi16(res6, res7); in vp9_fdct8x8_sse2()