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Searched refs:rotr (Results 1 – 25 of 75) sorted by relevance

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/external/llvm/test/MC/Mips/
Dset-mips0-directive.s5 rotr $7, $7, 22
10 rotr $2, $2, 15
15 rotr $3, $3, 19
17 # CHECK: rotr $7, $7, 22
22 # CHECK: rotr $2, $2, 15
27 # CHECK: rotr $3, $3, 19
Dset-mips-directives.s19 rotr $2,15
22 rotr $2,15
25 rotr $2,15
55 # CHECK: rotr $2, $2, 15
58 # CHECK: rotr $2, $2, 15
61 # CHECK: rotr $2, $2, 15
Dset-arch.s18 rotr $2, $2, 15
21 rotr $2, $2, 15
24 rotr $2, $2, 15
56 # CHECK: rotr $2, $2, 15
Dmicromips-shift-instructions.s16 # CHECK-EL: rotr $9, $6, 7 # encoding: [0x26,0x01,0xc0,0x38]
27 # CHECK-EB: rotr $9, $6, 7 # encoding: [0x01,0x26,0x38,0xc0]
35 rotr $9, $6, 7
Dmips-alu-instructions.s19 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
50 rotr $9, $6, 7
Dmips64-alu-instructions.s17 # CHECK: rotr $9, $6, 7 # encoding: [0xc2,0x49,0x26,0x00]
45 rotr $9, $6, 7
/external/llvm/test/CodeGen/Mips/
Dbswap.ll9 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
13 ; MIPS64: rotr ${{[0-9]+}}, $[[R0]], 16
36 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
38 ; MIPS32: rotr ${{[0-9]+}}, $[[R0]], 16
76 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
78 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
80 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
82 ; MIPS32-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
86 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
88 ; MIPS64-DAG: rotr ${{[0-9]+}}, $[[R0]], 16
[all …]
Drotate.ll15 ; CHECK: rotr $2, $4, 22
36 ; CHECK: rotr $2, $4, 10
/external/wpa_supplicant_8/src/crypto/
Daes_i.h70 static inline u32 rotr(u32 val, int bits) in rotr() function
76 #define TE1(i) rotr(Te0[((i) >> 16) & 0xff], 8)
77 #define TE2(i) rotr(Te0[((i) >> 8) & 0xff], 16)
78 #define TE3(i) rotr(Te0[(i) & 0xff], 24)
94 #define TD1(i) rotr(Td0[((i) >> 16) & 0xff], 8)
95 #define TD2(i) rotr(Td0[((i) >> 8) & 0xff], 16)
96 #define TD3(i) rotr(Td0[(i) & 0xff], 24)
102 #define TD1_(i) rotr(Td0[(i) & 0xff], 8)
103 #define TD2_(i) rotr(Td0[(i) & 0xff], 16)
104 #define TD3_(i) rotr(Td0[(i) & 0xff], 24)
/external/llvm/test/TableGen/
DSetTheory.td115 // The 'rotr' operator rotates right, but also accepts a negative shift.
116 def rotr;
117 def S7a : Set<(rotr S0f, 0)>;
118 def S7b : Set<(rotr S0f, 1)>;
119 def S7c : Set<(rotr S0f, 3)>;
120 def S7d : Set<(rotr S0f, 4)>;
121 def S7e : Set<(rotr S0f, 5)>;
122 def S7f : Set<(rotr S0f, -1)>;
123 def S7g : Set<(rotr S0f, -4)>;
124 def S7h : Set<(rotr S0f, -5)>;
/external/llvm/test/CodeGen/AArch64/
Darm64-regress-interphase-shift.ll5 ; unselectable "rotr" node: (i32 (rotr i32, i64)).
/external/llvm/unittests/ADT/
DAPIntTest.cpp158 EXPECT_EQ(one, one.rotr(0)); in TEST()
159 EXPECT_EQ(one, one.rotr(1)); in TEST()
708 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(0)); in TEST()
709 EXPECT_EQ(APInt(8, 8), APInt(8, 16).rotr(1)); in TEST()
710 EXPECT_EQ(APInt(8, 4), APInt(8, 16).rotr(2)); in TEST()
711 EXPECT_EQ(APInt(8, 1), APInt(8, 16).rotr(4)); in TEST()
712 EXPECT_EQ(APInt(8, 16), APInt(8, 16).rotr(8)); in TEST()
714 EXPECT_EQ(APInt(8, 1), APInt(8, 1).rotr(0)); in TEST()
715 EXPECT_EQ(APInt(8, 128), APInt(8, 1).rotr(1)); in TEST()
716 EXPECT_EQ(APInt(8, 64), APInt(8, 1).rotr(2)); in TEST()
[all …]
/external/skia/bench/
DFontCacheBench.cpp56 static uint32_t rotr(uint32_t value, unsigned bits) { in rotr() function
103 if (false) rotr(0, 0); in FontCacheEfficiency()
/external/valgrind/none/tests/mips64/
Dshift_instructions.stdout.exp-mips64r218433 rotr $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
18434 rotr $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
18435 rotr $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
18436 rotr $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
18437 rotr $t0, $t1, 0x00 :: rt 0x0, rs 0x0, imm 0x0000
18438 rotr $t2, $t3, 0x1f :: rt 0x0, rs 0x0, imm 0x001f
18439 rotr $a0, $a1, 0x0f :: rt 0x0, rs 0x0, imm 0x000f
18440 rotr $s0, $s1, 0x03 :: rt 0x0, rs 0x0, imm 0x0003
18441 rotr $t0, $t1, 0x00 :: rt 0x9823b6e, rs 0x9823b6e, imm 0x0000
18442 rotr $t2, $t3, 0x1f :: rt 0x130476dc, rs 0x9823b6e, imm 0x001f
[all …]
/external/llvm/test/MC/Mips/mips64/
Dinvalid-mips64r2.s20 …rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
21 …rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td580 [(set GR8:$dst, (rotr GR8:$src1, CL))], IIC_SR>;
583 [(set GR16:$dst, (rotr GR16:$src1, CL))], IIC_SR>, OpSize16;
586 [(set GR32:$dst, (rotr GR32:$src1, CL))], IIC_SR>, OpSize32;
589 [(set GR64:$dst, (rotr GR64:$src1, CL))], IIC_SR>;
594 [(set GR8:$dst, (rotr GR8:$src1, (i8 imm:$src2)))], IIC_SR>;
597 [(set GR16:$dst, (rotr GR16:$src1, (i8 imm:$src2)))],
601 [(set GR32:$dst, (rotr GR32:$src1, (i8 imm:$src2)))],
606 [(set GR64:$dst, (rotr GR64:$src1, (i8 imm:$src2)))],
612 [(set GR8:$dst, (rotr GR8:$src1, (i8 1)))],
616 [(set GR16:$dst, (rotr GR16:$src1, (i8 1)))],
[all …]
/external/v8/test/cctest/
Dtest-disasm-mips.cc356 COMPARE(rotr(a0, a1, 0), in TEST()
358 COMPARE(rotr(s0, s1, 8), in TEST()
360 COMPARE(rotr(t2, t3, 24), in TEST()
362 COMPARE(rotr(v0, v1, 31), in TEST()
Dtest-disasm-mips64.cc493 COMPARE(rotr(a0, a1, 0), in TEST()
495 COMPARE(rotr(s0, s1, 8), in TEST()
497 COMPARE(rotr(a6, a7, 24), in TEST()
499 COMPARE(rotr(v0, v1, 31), in TEST()
/external/llvm/test/MC/Mips/mips32r3/
Dvalid.s165 … rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
166 … rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
/external/llvm/test/MC/Mips/mips32r5/
Dvalid.s165 … rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
166 … rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
/external/llvm/test/MC/Mips/mips32r2/
Dvalid.s165 … rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
166 … rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
/external/boringssl/src/crypto/sha/asm/
Dsha1-586.pl172 &rotr($b,2); # b=ROTATE(b,30)
199 &rotr($b,$n==16?2:7); # b=ROTATE(b,30)
216 &rotr($b,2); # b=ROTATE(b,30)
241 &rotr($b,7); # b=ROTATE(b,30)
249 &rotr($a,5) if ($n==79);
259 &rotr($b,2); # b=ROTATE(b,30)
284 &rotr($b,7); # b=ROTATE(b,30)
303 &rotr($b,2); # b=ROTATE(b,30)
/external/llvm/test/MC/Mips/mips5/
Dinvalid-mips64r2.s34 …rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
35 …rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
/external/llvm/test/MC/Mips/mips32/
Dinvalid-mips32r2.s28 …rotr $1,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
29 …rotr $1,$14,15 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feat…
/external/boringssl/src/crypto/perlasm/
Dcbc.pl283 &rotr("edx", 16);
294 &rotr("ecx", 16);

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