Searched refs:s_add_i32 (Results 1 – 13 of 13) sorted by relevance
| /external/llvm/test/CodeGen/R600/ |
| D | add.ll | 65 ; SI: s_add_i32
66 ; SI: s_add_i32
67 ; SI: s_add_i32
68 ; SI: s_add_i32
69 ; SI: s_add_i32
70 ; SI: s_add_i32
71 ; SI: s_add_i32
72 ; SI: s_add_i32
97 ; SI: s_add_i32
98 ; SI: s_add_i32
[all …]
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| D | gep-address-space.ll | 19 ; CI: s_add_i32
28 ; CHECK: s_add_i32
29 ; CHECK: s_add_i32
30 ; CHECK: s_add_i32
31 ; CHECK: s_add_i32
46 ; CHECK: s_add_i32
47 ; CHECK: s_add_i32
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| D | shl_add_constant.ll | 60 ; SI: s_add_i32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]]
61 ; SI: s_add_i32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8
76 ; SI: s_add_i32 [[TMP:s[0-9]+]], [[SHL3]], [[Y]]
77 ; SI: s_add_i32 [[RESULT:s[0-9]+]], [[TMP]], 0x3d8
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| D | 32-bit-local-address-space.ll | 24 ; SI: s_add_i32 [[SPTR:s[0-9]]]
48 ; SI: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004
72 ; SI-NEXT: s_add_i32
111 ; SI: s_add_i32 [[SADDR:s[0-9]+]],
132 ; SI: s_add_i32 [[SPTR:s[0-9]]], s{{[0-9]+}}, 0x10004
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| D | sgpr-control-flow.ll | 38 ; SI: s_add_i32 [[SGPR:s[0-9]+]]
39 ; SI-NOT: s_add_i32 [[SGPR]]
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| D | add_i64.ll | 75 ; SI: s_add_i32 [[SRESULT:s[0-9]+]], s[[SREG1]], s[[SREG0]]
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| D | uaddo.ll | 23 ; SI: s_add_i32
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| D | fceil64.ll | 16 ; SI: s_add_i32 s{{[0-9]+}}, [[SEXP]], 0xfffffc01
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| D | ftrunc.f64.ll | 28 ; SI: s_add_i32 s{{[0-9]+}}, [[SEXP]], 0xfffffc01
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| D | local-64.ll | 39 ; CI: s_add_i32 [[ADDR:s[0-9]+]], s{{[0-9]+}}, 0x10000
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| D | sext-in-reg.ll | 25 ; SI: s_add_i32 [[VAL:s[0-9]+]],
43 ; SI: s_add_i32 [[VAL:s[0-9]+]],
61 ; SI: s_add_i32 [[VAL:s[0-9]+]],
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| /external/llvm/test/MC/R600/ |
| D | sop2.s | 11 s_add_i32 s1, s2, s3 label
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| /external/llvm/lib/Target/R600/ |
| D | SIInstructions.td | 203 defm S_ADD_I32 : SOP2_32 <sop2<0x02>, "s_add_i32",
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