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Searched refs:schedulers (Results 1 – 11 of 11) sorted by relevance

/external/strace/
Dsched.c12 tcp->auxstr = xlookup(schedulers, tcp->u_rval); in SYS_FUNC()
24 printxval(schedulers, tcp->u_arg[1], "SCHED_???"); in SYS_FUNC()
62 printxval(schedulers, tcp->u_arg[0], "SCHED_???"); in SYS_FUNC()
/external/strace/xlat/
Dschedulers.h3 static const struct xlat schedulers[] = { variable
DMakemodule.am1 ….in xlat/rename_flags.in xlat/resource_flags.in xlat/resources.in xlat/schedulers.in xlat/scmvals.…
2 …ypes.h xlat/rename_flags.h xlat/resource_flags.h xlat/resources.h xlat/schedulers.h xlat/scmvals.h…
287 $(top_srcdir)/xlat/schedulers.h: $(top_srcdir)/xlat/schedulers.in $(top_srcdir)/xlat/gen.sh
/external/llvm/test/CodeGen/Generic/
D2006-07-03-schedulers.ll6 ; The top-down schedulers are excluded here because they don't yet support
/external/llvm/docs/CommandGuide/
Dlli.rst211 Instruction schedulers available (before register allocation):
/external/llvm/lib/Target/X86/
DX86ScheduleBtVer2.td74 // as two micro-ops when dispatched by the schedulers.
/external/fio/
DREADME365 of the Linux IO subsystem and schedulers. He got tired of writing
/external/blktrace/btt/doc/
Dbtt.tex321 An important consideration when analyzing block IO schedulers is to
/external/llvm/lib/Target/ARM/
DARMScheduleSwift.td16 // required until SD and PostRA schedulers are replaced by MachineScheduler.
DARMScheduleA9.td16 // required until SD and PostRA schedulers are replaced by MachineScheduler.
/external/llvm/docs/
DWritingAnLLVMPass.rst1297 option. Registering instruction schedulers is similar except use the