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Searched refs:sel1 (Results 1 – 13 of 13) sorted by relevance

/external/llvm/test/Transforms/InstCombine/
Dselect-select.ll27 ; CHECK: %[[sel1:.*]] = select i1 %bool, <2 x i32> %[[sel0]], <2 x i32> %V
28 ; CHECK: ret <2 x i32> %[[sel1]]
30 %sel1 = select i1 %bool, <2 x i32> %sel0, <2 x i32> %V
31 ret <2 x i32> %sel1
/external/llvm/test/CodeGen/Hexagon/
Dgp-rel.ll31 %sel1 = select i1 %cmp2, i32 %2, i32 %1
32 ret i32 %sel1
/external/llvm/test/Analysis/Lint/
Dcppeh-catch-intrinsics-clean.ll72 %sel1 = extractvalue { i8*, i32 } %l1.0, 1
74 %matchesl1 = icmp eq i32 %sel1, %l1.1
79 %sel2 = phi i32 [%sel, %lpad], [%sel1, %lpad1]
Dcppeh-catch-intrinsics.ll242 %sel1 = extractvalue { i8*, i32 } %l1.0, 1
244 %matchesl1 = icmp eq i32 %sel1, %l1.1
249 %sel2 = phi i32 [%sel, %lpad], [%sel1, %lpad1]
/external/clang/test/SemaObjC/
Darc-peformselector.m15 SEL sel1; field
28 …return [self performSelector : sel1]; // expected-warning {{performSelector may cause a leak becau…
/external/llvm/test/CodeGen/Hexagon/vect/
Dvect-load.ll33 %sel1 = and i1 %cmp23, %cmp25
34 br i1 %sel1, label %while.body, label %while.end422
/external/llvm/test/CodeGen/SystemZ/
Dasm-18.ll543 %sel1 = select i1 %cmp1, i32 100, i32 200
546 "=h,r,r"(i32 %sel1, i32 %sel2)
683 %sel1 = select i1 %cmp1, i32 0, i32 1
684 %res2 = call i32 asm "stepb $0, $1", "=h,r"(i32 %sel1)
700 %sel1 = select i1 %cmp1, i32 0, i32 1
701 %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %sel1)
718 %sel1 = select i1 %cmp1, i32 0, i32 1
719 %res2 = call i32 asm "stepb $0, $1", "=h,r"(i32 %sel1)
738 %sel1 = select i1 %cmp1, i32 0, i32 1
739 %res2 = call i32 asm "stepb $0, $1", "=r,r"(i32 %sel1)
Dfp-cmp-02.ll138 %sel1 = select i1 %cmp1, double %sel0, double 1.0
139 %sel2 = select i1 %cmp2, double %sel1, double 2.0
Dfp-cmp-01.ll138 %sel1 = select i1 %cmp1, float %sel0, float 1.0
139 %sel2 = select i1 %cmp2, float %sel1, float 2.0
Dint-cmp-05.ll281 %sel1 = select i1 %cmp1, i64 %sel0, i64 1
282 %sel2 = select i1 %cmp2, i64 %sel1, i64 2
Dint-cmp-06.ll331 %sel1 = select i1 %cmp1, i64 %sel0, i64 1
332 %sel2 = select i1 %cmp2, i64 %sel1, i64 2
/external/llvm/test/CodeGen/R600/
Dsext-in-reg.ll407 %sel1 = select i1 %cmp_eq, i8 0, i8 %a
408 %xor = xor i8 %sel0, %sel1
419 %sel1 = select i1 %cmp_eq, i8 0, i8 %a
420 %xor = xor i8 %sel0, %sel1
/external/mesa3d/src/gallium/drivers/r600/
Dr600_shader.c276 unsigned sel0, sel1; in r600_src_from_byte_stream() local
278 sel1 = bytes[bytes_read++]; in r600_src_from_byte_stream()
279 alu->src[src_idx].sel = sel0 | (sel1 << 8); in r600_src_from_byte_stream()