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Searched refs:setMemRefs (Results 1 – 25 of 30) sorted by relevance

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/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp438 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVLD()
491 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandVST()
581 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandLaneOp()
682 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
683 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
731 LO16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
732 HI16->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMOV32BitImm()
944 MIB->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
959 MIB1->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
1058 MIB3->setMemRefs(MI.memoperands_begin(), MI.memoperands_end()); in ExpandMI()
[all …]
DARMInstrInfo.cpp131 MIB.setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadStackGuard()
DARMISelDAGToDAG.cpp1886 cast<MachineSDNode>(VLd)->setMemRefs(MemOp, MemOp + 1); in SelectVLD()
2006 cast<MachineSDNode>(VSt)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2029 cast<MachineSDNode>(VStA)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2048 cast<MachineSDNode>(VStB)->setMemRefs(MemOp, MemOp + 1); in SelectVST()
2153 cast<MachineSDNode>(VLdLn)->setMemRefs(MemOp, MemOp + 1); in SelectVLDSTLane()
2239 cast<MachineSDNode>(VLdDup)->setMemRefs(MemOp, MemOp + 1); in SelectVLDDup()
3048 cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); in Select()
3113 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in Select()
DThumb2SizeReduction.cpp513 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in ReduceLoadStore()
DARMLoadStoreOptimizer.cpp1180 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in MergeBaseUpdateLSMultiple()
1955 MI->setMemRefs(MemBegin, MemEnd); in concatenateMemOperands()
DARMBaseInstrInfo.cpp1410 MIB->setMemRefs(Orig->memoperands_begin(), Orig->memoperands_end()); in reMaterialize()
4078 MIB.setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in expandLoadStackGuardBase()
/external/llvm/lib/Target/Hexagon/
DHexagonISelDAGToDAG.cpp266 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadSignExtend64()
288 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadSignExtend64()
323 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadZeroExtend64()
350 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoadZeroExtend64()
417 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoad()
440 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedLoad()
508 cast<MachineSDNode>(Result)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
540 cast<MachineSDNode>(Result_1)->setMemRefs(MemOp, MemOp + 1); in SelectIndexedStore()
DHexagonExpandCondsets.cpp920 MB.setMemRefs(MemRefs, MemRefs+NR); in predicateAt()
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h163 const MachineInstrBuilder &setMemRefs(MachineInstr::mmo_iterator b, in setMemRefs() function
165 MI->setMemRefs(b, e); in setMemRefs()
DMachineInstr.h1162 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
DSelectionDAGNodes.h2017 void setMemRefs(mmo_iterator NewMemRefs, mmo_iterator NewMemRefsEnd) {
/external/llvm/lib/CodeGen/
DTargetInstrInfo.cpp472 NewMI->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in foldMemoryOperand()
545 NewMI->setMemRefs(LoadMI->memoperands_begin(), in foldMemoryOperand()
550 NewMI->setMemRefs(MI->memoperands_begin(), in foldMemoryOperand()
DMachineInstr.cpp808 setMemRefs(NewMemRefs, NewMemRefs + NewNum); in addMemOperand()
DTargetLoweringBase.cpp1119 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in emitPatchPoint()
/external/llvm/lib/Target/Mips/
DMipsInstrInfo.cpp287 MIB.setMemRefs(I->memoperands_begin(), I->memoperands_end()); in genInstrWithNewOpc()
/external/llvm/lib/Target/XCore/
DXCoreISelDAGToDAG.cpp156 cast<MachineSDNode>(node)->setMemRefs(MemOp, MemOp + 1); in Select()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp367 cast<MachineSDNode>(ResNode)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectIndexedBinOp()
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp848 cast<MachineSDNode>(NVPTXLD)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectLoad()
1230 cast<MachineSDNode>(LD)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectLoadVector()
1986 cast<MachineSDNode>(LD)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectLDGLDU()
2213 cast<MachineSDNode>(NVPTXST)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStore()
2588 cast<MachineSDNode>(ST)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStoreVector()
2840 cast<MachineSDNode>(Ret)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStoreRetval()
2996 cast<MachineSDNode>(Ret)->setMemRefs(MemRefs0, MemRefs0 + 1); in SelectStoreParam()
/external/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGSDNodes.cpp160 MN->setMemRefs(Begin, End); in CloneNodeWithValues()
DInstrEmitter.cpp806 MIB.setMemRefs(cast<MachineSDNode>(Node)->memoperands_begin(), in EmitMachineNode()
/external/llvm/lib/Target/AArch64/
DAArch64ISelDAGToDAG.cpp1301 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in SelectStoreLane()
1336 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in SelectPostStoreLane()
2233 cast<MachineSDNode>(Ld)->setMemRefs(MemOp, MemOp + 1); in Select()
2253 cast<MachineSDNode>(St)->setMemRefs(MemOp, MemOp + 1); in Select()
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp1863 cast<MachineSDNode>(Ret)->setMemRefs(MemOp, MemOp + 1); in SelectAtomicLoadArith()
2800 Result->setMemRefs(MemOp, MemOp + 2); in Select()
DX86InstrInfo.cpp4013 (*MIB).setMemRefs(MMOBegin, MMOEnd); in storeRegToAddr()
4047 (*MIB).setMemRefs(MMOBegin, MMOEnd); in loadRegFromAddr()
5570 cast<MachineSDNode>(Load)->setMemRefs(MMOs.first, MMOs.second); in unfoldMemoryOperand()
5614 cast<MachineSDNode>(Store)->setMemRefs(MMOs.first, MMOs.second); in unfoldMemoryOperand()
DX86ISelLowering.cpp17962 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in EmitPCMPSTRM()
17999 MIB->setMemRefs(MI->memoperands_begin(), MI->memoperands_end()); in EmitPCMPSTRI()
18162 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
18187 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
18215 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
18234 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
18271 .setMemRefs(MMOBegin, MMOEnd); in EmitVAARG64WithCustomInserter()
18897 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
18975 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
18984 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
[all …]
/external/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp8129 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
8145 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
8180 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjSetJmp()
8247 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
8259 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
8271 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
8283 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()
8292 MIB.setMemRefs(MMOBegin, MMOEnd); in emitEHSjLjLongJmp()

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