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/external/llvm/test/MC/X86/
Dintel-syntax.s382 shrd DX, BX define
383 shrd DX, BX, CL define
384 shrd DX, BX, 1 define
385 shrd [RAX], BX label
386 shrd [RAX], BX, CL label
Dx86-64.s362 shrd %bx, %dx label
363 shrd %cl, %bx, %dx label
364 shrd $1, %bx, %dx label
365 shrd %bx, (%rax) label
366 shrd %cl, %bx, (%rax) label
/external/llvm/test/CodeGen/X86/
Dx86-64-double-shifts-var.ll20 ; double precision shift instructions we do not generate 'shld' or 'shrd'
47 ; CHECK-NOT: shrd
Dx86-64-double-precision-shift-right.ll4 ; of instructions with lower latencies instead of shrd instruction.
Drot64.ll5 ; RUN: grep shrd %t | count 2
/external/boringssl/win-x86/crypto/modes/
Dghash-x86.asm64 shrd ebx,ecx,4
66 shrd ecx,edx,4
67 shrd edx,ebp,4
79 shrd ebx,ecx,4
81 shrd ecx,edx,4
82 shrd edx,ebp,4
166 shrd ebx,ecx,4
168 shrd ecx,edx,4
169 shrd edx,ebp,4
181 shrd ebx,ecx,4
[all …]
/external/boringssl/src/crypto/modes/asm/
Dghash-x86.pl167 &shrd ($Zll,$Zlh,4);
169 &shrd ($Zlh,$Zhl,4);
170 &shrd ($Zhl,$Zhh,4);
198 &shrd ($Zll,$Zlh,4);
200 &shrd ($Zlh,$Zhl,4);
201 &shrd ($Zhl,$Zhh,4);
/external/llvm/lib/Target/X86/
DX86InstrShiftRotate.td699 "shrd{w}\t{%cl, $src2, $dst|$dst, $src2, cl}",
710 "shrd{l}\t{%cl, $src2, $dst|$dst, $src2, cl}",
721 "shrd{q}\t{%cl, $src2, $dst|$dst, $src2, cl}",
738 "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
752 "shrd{l}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
766 "shrd{q}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
780 "shrd{w}\t{%cl, $src2, $dst|$dst, $src2, cl}",
789 "shrd{l}\t{%cl, $src2, $dst|$dst, $src2, cl}",
798 "shrd{q}\t{%cl, $src2, $dst|$dst, $src2, cl}",
812 "shrd{w}\t{$src3, $src2, $dst|$dst, $src2, $src3}",
[all …]
DX86InstrInfo.td2863 // shld/shrd op,op -> shld op, op, CL
2867 def : InstAlias<"shrd{w}\t{$r2, $r1|$r1, $r2}", (SHRD16rrCL GR16:$r1, GR16:$r2), 0>;
2868 def : InstAlias<"shrd{l}\t{$r2, $r1|$r1, $r2}", (SHRD32rrCL GR32:$r1, GR32:$r2), 0>;
2869 def : InstAlias<"shrd{q}\t{$r2, $r1|$r1, $r2}", (SHRD64rrCL GR64:$r1, GR64:$r2), 0>;
2874 def : InstAlias<"shrd{w}\t{$reg, $mem|$mem, $reg}", (SHRD16mrCL i16mem:$mem, GR16:$reg), 0>;
2875 def : InstAlias<"shrd{l}\t{$reg, $mem|$mem, $reg}", (SHRD32mrCL i32mem:$mem, GR32:$reg), 0>;
2876 def : InstAlias<"shrd{q}\t{$reg, $mem|$mem, $reg}", (SHRD64mrCL i64mem:$mem, GR64:$reg), 0>;
/external/v8/src/x87/
Dassembler-x87.h739 void shrd(Register dst, Register src) { shrd(dst, Operand(src)); } in shrd() function
740 void shrd(Register dst, const Operand& src);
/external/v8/test/cctest/
Dtest-disasm-x87.cc123 __ shrd(edx, ecx); in TEST() local
218 __ shrd(edx, Operand(ebx, ecx, times_4, 10000)); in TEST() local
Dtest-disasm-x64.cc119 __ shrd(rdx, rcx); in TEST() local
196 __ shrd(rdx, rbx); in TEST() local
Dtest-disasm-ia32.cc123 __ shrd(edx, ecx); in TEST() local
218 __ shrd(edx, Operand(ebx, ecx, times_4, 10000)); in TEST() local
/external/icu/icu4c/source/data/misc/
DkeyTypeData.txt478 shrd{""}
/external/v8/src/ia32/
Dassembler-ia32.h756 void shrd(Register dst, Register src) { shrd(dst, Operand(src)); } in shrd() function
757 void shrd(Register dst, const Operand& src);
/external/mesa3d/src/mesa/x86/
Dassyntax.h655 #define SHRD_L(a,b,c) CHOICE(shrdl ARG3(a,b,c), shrdl ARG3(a,b,c), _LTOG shrd ARG3(c,b,a))
656 #define SHRD2_L(a,b) CHOICE(shrdl ARG2(a,b), shrdl ARG3(CL,a,b), _LTOG shrd ARG3(b,a,CL))
657 #define SHRD_W(a,b,c) CHOICE(shrdw ARG3(a,b,c), shrdw ARG3(a,b,c), _WTOG shrd ARG3(c,b,a))
658 #define SHRD2_W(a,b) CHOICE(shrdw ARG2(a,b), shrdw ARG3(CL,a,b), _WTOG shrd ARG3(b,a,CL))
1376 #define SHRD_L(a,b,c) shrd
1377 #define SHRD2_L(a,b) shrd L_(b), L_(a)
1378 #define SHRD_W(a,b,c) shrd
1379 #define SHRD2_W(a,b) shrd W_(b), W_(a)
/external/boringssl/src/crypto/sha/asm/
Dsha256-586.pl333 local *ror = sub { &shrd(@_[0],@_) };
1060 local *ror = sub { &shrd(@_[0],@_) };
/external/icu/icu4c/source/data/lang/
Dko.txt852 shrd{"샤라다 숫자"}
Dug.txt779 shrd{"شاراداچە رەقەملەر"}
Dru.txt841 shrd{"цифры шарада"}
Dzh_Hant.txt925 shrd{"夏拉達數字"}
Dth.txt942 shrd{"ตัวเลขชาราดา"}
Dja.txt937 shrd{"シャーラダー数字"}
/external/valgrind/VEX/test/
Dtest-i386.c136 #define OP shrd
/external/llvm/test/Instrumentation/AddressSanitizer/X86/
Dbug_11395.ll63 …x, %edx\0A\09mov %esi, %eax\0A\09movzbl $7 , %ecx\0A\09shrd %cl, %edx, %eax\…

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