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Searched refs:simm7 (Results 1 – 4 of 4) sorted by relevance

/external/valgrind/
DREADME.aarch64223 LDP,STP (immediate, simm7) (FP&VEC)
/external/llvm/lib/Target/Mips/
DMicroMipsInstrInfo.td7 def simm7 : Operand<i32>;
103 let MIOperandInfo = (ops GPRMM16:$base, simm7:$offset);
/external/valgrind/VEX/priv/
Dguest_arm64_toIR.c4818 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store() local
4829 simm7 = (bX ? 8 : 4) * simm7; in dis_ARM64_load_store()
4830 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm7))); in dis_ARM64_load_store()
4857 = bWBack && simm7 < 0 in dis_ARM64_load_store()
4910 nameIReg64orSP(rN), simm7); in dis_ARM64_load_store()
5252 Long simm7 = (Long)sx_to_64(INSN(21,15), 7); in dis_ARM64_load_store() local
5266 simm7 = szB * simm7; in dis_ARM64_load_store()
5267 assign(tEA, binop(Iop_Add64, mkexpr(tRN), mkU64(simm7))); in dis_ARM64_load_store()
5305 = wBack && simm7 < 0 in dis_ARM64_load_store()
5351 nameIReg64orSP(nn), simm7); in dis_ARM64_load_store()
/external/valgrind/none/tests/arm64/
Dmemory.stdout.exp10 LDUR,STUR (immediate, simm9): STR cases are MISSINGLDP,STP (immediate, simm7) (STR cases and wb che…
54 LDP,STP (immediate, simm7) (FP&VEC) (entirely MISSING)
522 LDP,STP (immediate, simm7)
2928 LDP,STP (immediate, simm7) (FP&VEC)
3469 LDNP,STNP (immediate, simm7) (FP&VEC, w/ nontemporal hint)