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/external/libhevc/common/arm64/
Dihevc_itrans_recon_32x32.s259 smlsl v30.4s, v14.4h, v7.h[1]
264 smlsl v28.4s, v15.4h, v7.h[1]
265 smlsl v30.4s, v15.4h, v3.h[3]
275 smlsl v18.4s, v13.4h, v5.h[2]
288 smlsl v28.4s, v8.4h, v4.h[3] //// y1 * sin3(part of b2)
289 smlsl v30.4s, v8.4h, v0.h[1] //// y1 * sin1(part of b3)
292 smlsl v26.4s, v9.4h, v7.h[3] //// y1 * cos3 - y3 * sin1(part of b1)
293 smlsl v28.4s, v9.4h, v2.h[1] //// y1 * sin3 - y3 * cos1(part of b2)
294 smlsl v30.4s, v9.4h, v3.h[1] //// y1 * sin1 - y3 * sin3(part of b3)
307 smlsl v16.4s, v10.4h, v6.h[0]
[all …]
Dihevc_itrans_recon_16x16.s263 smlsl v30.4s, v7.4h, v2.h[3] //// y1 * sin1 - y3 * sin3(part of b3)
284 smlsl v28.4s, v8.4h, v1.h[3]
285 smlsl v30.4s, v8.4h, v0.h[3]
289 smlsl v26.4s, v9.4h, v2.h[3]
290 smlsl v28.4s, v9.4h, v0.h[3]
300 smlsl v14.4s, v5.4h, v3.h[2]
301 smlsl v16.4s, v4.4h, v3.h[0]
302 smlsl v16.4s, v5.4h, v0.h[2]
303 smlsl v18.4s, v4.4h, v1.h[0]
304 smlsl v18.4s, v5.4h, v2.h[2]
[all …]
Dihevc_itrans_recon_4x4_ttype1.s147 smlsl v5.4s, v2.4h, v4.h[0] //74 * pi2_src[1] + 55 * pi2_src[0] - 29 * pi2_src[2]
148 …smlsl v5.4s, v3.4h, v4.h[3] //pi2_out[1] = 74 * pi2_src[1] + 55 * pi2_src[0] - 29 * p…
151 smlsl v7.4s, v2.4h, v4.h[2] // 74 * pi2_src[0] - 74 * pi2_src[2]
155 smlsl v20.4s, v1.4h, v4.h[2] // 55 * pi2_src[2] - 74 * pi2_src[1]
156 …smlsl v20.4s, v3.4h, v4.h[0] // - 74 * pi2_src[1] + 55 * pi2_src[2] - 29 * pi2_src…
190 smlsl v5.4s, v16.4h, v4.h[0] //74 * pi2_src[1] + 55 * pi2_src[0] - 29 * pi2_src[2]
191 …smlsl v5.4s, v17.4h, v4.h[3] //pi2_out[1] = 74 * pi2_src[1] + 55 * pi2_src[0] - 29 * p…
194 smlsl v7.4s, v16.4h, v4.h[2] // 74 * pi2_src[0] - 74 * pi2_src[2]
199 smlsl v20.4s, v22.4h, v4.h[2] // - 74 * pi2_src[1] + 55 * pi2_src[2]
200 …smlsl v20.4s, v17.4h, v4.h[0] // - 74 * pi2_src[1] + 55 * pi2_src[2] - 29 * pi2_src…
Dihevc_itrans_recon_8x8.s202 smlsl v26.4s, v7.4h, v1.h[3] //// y1 * cos3 - y3 * sin1(part of b1)
204 smlsl v28.4s, v7.4h, v0.h[1] //// y1 * sin3 - y3 * cos1(part of b2)
206 smlsl v30.4s, v7.4h, v1.h[1] //// y1 * sin1 - y3 * sin3(part of b3)
235 smlsl v26.4s, v14.4h, v0.h[1] //// y1 * cos3 - y3 * sin1 - y5 * cos1(part of b1)
239 smlsl v18.4s, v11.4h, v0.h[2] //// d1 = y2 * sin2 - y6 * cos2(part of a0 and a1)
246 …smlsl v26.4s, v15.4h, v1.h[1] //// b1 = y1 * cos3 - y3 * sin1 - y5 * cos1 - y7 * sin3(pa…
248 …smlsl v30.4s, v15.4h, v0.h[1] //// b3 = y1 * sin1 - y3 * sin3 + y5 * cos3 - y7 * cos1(pa…
310 smlsl v26.4s, v7.4h, v1.h[3] //// y1 * cos3 - y3 * sin1(part of b1)
311 smlsl v28.4s, v7.4h, v0.h[1] //// y1 * sin3 - y3 * cos1(part of b2)
312 smlsl v30.4s, v7.4h, v1.h[1] //// y1 * sin1 - y3 * sin3(part of b3)
[all …]
Dihevc_itrans_recon_4x4.s147 smlsl v5.4s, v3.4h, v4.h[1] //o[1] = 36 * pi2_src[1] - 83 * pi2_src[3]
180 smlsl v5.4s, v3.4h, v4.h[1] //o[1] = 36 * pi2_src[1] - 83 * pi2_src[3]
/external/libavc/encoder/armv8/
Dih264e_half_pel_av8.s337 smlsl v26.4s, v28.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 (set1)
338 smlsl v26.4s, v21.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (set1)
348 smlsl v20.4s, v28.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 (set2)
349 smlsl v20.4s, v22.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (set2)
366 smlsl v2.4s, v28.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 (set3)
367 smlsl v2.4s, v23.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (set3)
380 smlsl v26.4s, v28.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 (set4)
381 smlsl v26.4s, v24.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (set4)
393 smlsl v22.4s, v31.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 (set5)
394 smlsl v22.4s, v25.4h, v0.h[0] //// a0 + a5 + 20a2 + 20a3 - 5a1 - 5a4 (set5)
[all …]
/external/libmpeg2/common/armv8/
Dimpeg2_idct.s402 smlsl v26.4s, v7.4h, v1.4h[3] //// y1 * cos3 - y3 * sin1(part of b1)
404 smlsl v28.4s, v7.4h, v0.4h[1] //// y1 * sin3 - y3 * cos1(part of b2)
406 smlsl v30.4s, v7.4h, v1.4h[1] //// y1 * sin1 - y3 * sin3(part of b3)
435 smlsl v26.4s, v14.4h, v0.4h[1] //// y1 * cos3 - y3 * sin1 - y5 * cos1(part of b1)
439 smlsl v18.4s, v11.4h, v0.4h[2] //// d1 = y2 * sin2 - y6 * cos2(part of a0 and a1)
446 …smlsl v26.4s, v15.4h, v1.4h[1] //// b1 = y1 * cos3 - y3 * sin1 - y5 * cos1 - y7 * sin3(p…
448 …smlsl v30.4s, v15.4h, v0.4h[1] //// b3 = y1 * sin1 - y3 * sin3 + y5 * cos3 - y7 * cos1(p…
511 smlsl v26.4s, v7.4h, v1.4h[3] //// y1 * cos3 - y3 * sin1(part of b1)
512 smlsl v28.4s, v7.4h, v0.4h[1] //// y1 * sin3 - y3 * cos1(part of b2)
513 smlsl v30.4s, v7.4h, v1.4h[1] //// y1 * sin1 - y3 * sin3(part of b3)
[all …]
/external/libavc/common/armv8/
Dih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s137 smlsl v26.4s, v24.4h, v30.4h
162 smlsl v26.4s, v24.4h, v30.4h
218 smlsl v26.4s, v24.4h, v30.4h
244 smlsl v26.4s, v24.4h, v30.4h
297 smlsl v26.4s, v24.4h, v30.4h
323 smlsl v26.4s, v24.4h, v30.4h
379 smlsl v26.4s, v24.4h, v30.4h
404 smlsl v26.4s, v24.4h, v30.4h
491 smlsl v30.4s, v18.4h, v24.4h
522 smlsl v30.4s, v18.4h, v24.4h
[all …]
Dih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s200 smlsl v26.4s, v24.4h, v30.4h
225 smlsl v26.4s, v24.4h, v30.4h
287 smlsl v26.4s, v24.4h, v30.4h
313 smlsl v26.4s, v24.4h, v30.4h
371 smlsl v26.4s, v24.4h, v30.4h
397 smlsl v26.4s, v24.4h, v30.4h
458 smlsl v26.4s, v24.4h, v30.4h
483 smlsl v26.4s, v24.4h, v30.4h
576 smlsl v30.4s, v18.4h, v24.4h
607 smlsl v30.4s, v18.4h, v24.4h
[all …]
Dih264_inter_pred_luma_horz_hpel_vert_qpel_av8.s262 smlsl v18.4s, v28.4h, v24.4h
299 smlsl v18.4s, v28.4h, v24.4h
339 smlsl v18.4s, v26.4h, v24.4h
365 smlsl v18.4s, v10.4h, v24.4h
511 smlsl v18.4s, v28.4h, v24.4h
545 smlsl v18.4s, v28.4h, v24.4h
584 smlsl v18.4s, v26.4h, v24.4h
610 smlsl v18.4s, v10.4h, v24.4h
755 smlsl v18.4s, v28.4h, v24.4h
792 smlsl v18.4s, v28.4h, v24.4h
[all …]
/external/llvm/test/MC/AArch64/
Dneon-2velem.s91 smlsl v0.4s, v1.4h, v2.h[2]
92 smlsl v0.2d, v1.2s, v2.s[2]
93 smlsl v0.2d, v1.2s, v22.s[2]
Dneon-3vdiff.s177 smlsl v0.8h, v1.8b, v2.8b
178 smlsl v0.4s, v1.4h, v2.4h
179 smlsl v0.2d, v1.2s, v2.2s
Dneon-diagnostics.s2379 smlsl v0.8h, v1.8h, v2.8b
2380 smlsl v0.4s, v1.4s, v2.4h
2381 smlsl v0.2d, v1.2d, v2.2s
3135 smlsl v0.4h, v1.4h, v2.h[2]
3136 smlsl v0.4s, v1.4h, v2.h[8]
3137 smlsl v0.4s, v1.4h, v16.h[2]
3138 smlsl v0.2s, v1.2s, v2.s[1]
3139 smlsl v0.2d, v1.2s, v2.s[4]
3140 smlsl v0.2d, v1.2s, v22.s[4]
Darm64-advsimd.s1082 smlsl.4s v0, v0, v0[0]
1084 smlsl.2d v0, v0, v0[2]
1151 ; CHECK: smlsl.4s v0, v0, v0[0] ; encoding: [0x00,0x60,0x40,0x0f]
1153 ; CHECK: smlsl.2d v0, v0, v0[2] ; encoding: [0x00,0x68,0x80,0x0f]
/external/llvm/test/CodeGen/AArch64/
Daarch64-smull.ll149 ; CHECK: smlsl {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
162 ; CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
175 ; CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
Darm64-vmul.ll278 ;CHECK: smlsl.4s
289 ;CHECK: smlsl.2d
1098 ;CHECK: smlsl.4s
1111 ;CHECK: smlsl.2d
Darm64-neon-3vdiff.ll1555 ; CHECK: smlsl {{v[0-9]+}}.8h, {{v[0-9]+}}.8b, {{v[0-9]+}}.8b
1564 ; CHECK: smlsl {{v[0-9]+}}.4s, {{v[0-9]+}}.4h, {{v[0-9]+}}.4h
1573 ; CHECK: smlsl {{v[0-9]+}}.2d, {{v[0-9]+}}.2s, {{v[0-9]+}}.2s
/external/vixl/src/vixl/a64/
Dsimulator-a64.h1655 LogicVRegister smlsl(VectorFormat vform,
2289 V(smlsl) \
Dmacro-assembler-a64.h2144 V(smlsl, Smlsl) \
2346 V(smlsl, Smlsl) \
Dassembler-a64.h2329 void smlsl(const VRegister& vd,
3384 void smlsl(const VRegister& vd,
Dlogic-a64.cc959 LogicVRegister Simulator::smlsl(VectorFormat vform, in smlsl() function in vixl::Simulator
967 return smlsl(vform, dst, src1, dup_element(indexform, temp, src2, index)); in smlsl()
3133 LogicVRegister Simulator::smlsl(VectorFormat vform, in smlsl() function in vixl::Simulator
/external/llvm/test/MC/Disassembler/AArch64/
Dneon-instructions.txt1266 # CHECK: smlsl v0.8h, v1.8b, v2.8b
1267 # CHECK: smlsl v0.4s, v1.4h, v2.4h
1268 # CHECK: smlsl v0.2d, v1.2s, v2.2s
Darm64-advsimd.txt1718 # CHECK: smlsl.4s v0, v0, v0[0]
1720 # CHECK: smlsl.2d v0, v0, v0[2]
/external/vixl/test/
Dtest-simulator-a64.cc3826 DEFINE_TEST_NEON_3DIFF_LONG(smlsl, Basic)
4054 DEFINE_TEST_NEON_BYELEMENT_DIFF(smlsl, Basic, Basic, Basic)
/external/vixl/doc/
Dsupported-instructions.md3194 void smlsl(const VRegister& vd,
3204 void smlsl(const VRegister& vd,

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