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Searched refs:sqdmlsl2 (Results 1 – 17 of 17) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-2velem.s150 sqdmlsl2 v0.4s, v1.8h, v1.h[2]
151 sqdmlsl2 v0.2d, v1.4s, v1.s[2]
152 sqdmlsl2 v0.2d, v1.4s, v22.s[2]
Dneon-3vdiff.s263 sqdmlsl2 v0.4s, v1.8h, v2.8h
264 sqdmlsl2 v0.2d, v1.4s, v2.4s
Dneon-diagnostics.s2536 sqdmlsl2 v0.4s, v1.8s, v2.8h
2537 sqdmlsl2 v0.2d, v1.4d, v2.4s
2548 sqdmlsl2 v0.8h, v1.16b, v2.16b
3341 sqdmlsl2 v0.4h, v1.8h, v1.h[2]
3342 sqdmlsl2 v0.4s, v1.8h, v1.h[8]
3343 sqdmlsl2 v0.4s, v1.8h, v16.h[2]
3344 sqdmlsl2 v0.2s, v1.4s, v1.s[2]
3345 sqdmlsl2 v0.2d, v1.4s, v1.s[4]
3346 sqdmlsl2 v0.2d, v1.4s, v22.s[4]
Darm64-advsimd.s1095 sqdmlsl2.4s v0, v0, v0[1]
1097 sqdmlsl2.2d v0, v0, v0[3]
1164 ; CHECK: sqdmlsl2.4s v0, v0, v0[1] ; encoding: [0x00,0x70,0x50,0x4f]
1166 ; CHECK: sqdmlsl2.2d v0, v0, v0[3] ; encoding: [0x00,0x78,0xa0,0x4f]
/external/llvm/test/CodeGen/AArch64/
Darm64-neon-2velem-high.ll241 ; CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
255 ; CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
Darm64-vmul.ll375 ;CHECK: sqdmlsl2.4s
388 ;CHECK: sqdmlsl2.2d
1150 ;CHECK: sqdmlsl2.4s
1164 ;CHECK: sqdmlsl2.2d
Darm64-neon-3vdiff.ll1769 ; CHECK: sqdmlsl2 {{v[0-9]+}}.4s, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h
1780 ; CHECK: sqdmlsl2 {{v[0-9]+}}.2d, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s
/external/vixl/src/vixl/a64/
Dsimulator-a64.h1700 LogicVRegister sqdmlsl2(VectorFormat vform,
2296 V(sqdmlsl2) \
Dmacro-assembler-a64.h2152 V(sqdmlsl2, Sqdmlsl2) \
2341 V(sqdmlsl2, Sqdmlsl2) \
Dassembler-a64.h2407 void sqdmlsl2(const VRegister& vd,
3429 void sqdmlsl2(const VRegister& vd,
Dlogic-a64.cc1067 LogicVRegister Simulator::sqdmlsl2(VectorFormat vform, in sqdmlsl2() function in vixl::Simulator
1075 return sqdmlsl2(vform, dst, src1, dup_element(indexform, temp, src2, index)); in sqdmlsl2()
3235 LogicVRegister Simulator::sqdmlsl2(VectorFormat vform, in sqdmlsl2() function in vixl::Simulator
Dsimulator-a64.cc2788 case NEON_SQDMLSL2: sqdmlsl2(vf_l, rd, rn, rm); break; in VisitNEON3Different()
2930 Op = &Simulator::sqdmlsl2; in VisitNEONByIndexedElement()
Dassembler-a64.cc2394 V(sqdmlsl2, NEON_SQDMLSL2, vn.Is1H() || vn.Is1S() || vn.Is8H() || vn.Is4S()) \
3535 V(sqdmlsl2, NEON_SQDMLSL_byelement, vn.IsVector() && vn.IsQ()) \ in NEON_FPBYELEMENT_LIST()
/external/vixl/doc/
Dsupported-instructions.md3353 void sqdmlsl2(const VRegister& vd,
3363 void sqdmlsl2(const VRegister& vd,
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1731 # CHECK: sqdmlsl2.4s v0, v0, v0[1]
1733 # CHECK: sqdmlsl2.2d v0, v0, v0[3]
Dneon-instructions.txt1341 # CHECK: sqdmlsl2 v0.4s, v1.8h, v2.8h
1342 # CHECK: sqdmlsl2 v0.2d, v1.4s, v2.4s
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp27994 sqdmlsl2 v29.2d, v20.4s, v3.s[1] 03f19a44ea019d8af8d2f00d3f7b429a 8fd52eb4cabe3a1b5aa1a19c1e8b9b…
27995 sqdmlsl2 v29.2d, v20.4s, v3.s[2] 1b609463a8a709981c0f2579bc5f388d e68e98b8b2f2ab63570295cba93eee…
27998 sqdmlsl2 v29.4s, v20.8h, v3.h[1] afe3b06db513e73c6d50df51c27cc265 48d8d69a8b0aeeacb32640fbe71ead…
27999 sqdmlsl2 v29.4s, v20.8h, v3.h[1] a431a60258024f7cdffb2e6be9685927 c445afc9cf651ed66457c7d7643fab…
28020 sqdmlsl2 v2.2d, v11.4s, v29.4s 1b6ecb060d84b0d270bf7bb8ac544e19 a96eb969882ff6f600b9bf058a79005c…
28022 sqdmlsl2 v2.4s, v11.8h, v29.8h d03efece8ba306274e3fbc0efde447c1 1292df8b592f9af8101d36624a04c70b…