| /external/libavc/common/armv8/ |
| D | ih264_iquant_itrans_recon_av8.s | 591 sqrshrn2 v0.8h, v17.4s, #6
593 sqrshrn2 v1.8h, v19.4s, #6
595 sqrshrn2 v2.8h, v21.4s, #6
597 sqrshrn2 v3.8h, v23.4s, #6
599 sqrshrn2 v4.8h, v25.4s, #6
601 sqrshrn2 v5.8h, v27.4s, #6
603 sqrshrn2 v6.8h, v29.4s, #6
605 sqrshrn2 v7.8h, v31.4s, #6
|
| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 370 sqrshrn2 v0.16b, v1.8h, #3
371 sqrshrn2 v0.8h, v1.4s, #3
372 sqrshrn2 v0.4s, v1.2d, #3
|
| D | arm64-advsimd.s | 1336 sqrshrn2.16b v0, v0, #2
1338 sqrshrn2.8h v0, v0, #4
1340 sqrshrn2.4s v0, v0, #6
1508 ; CHECK: sqrshrn2.16b v0, v0, #2 ; encoding: [0x00,0x9c,0x0e,0x4f]
1510 ; CHECK: sqrshrn2.8h v0, v0, #4 ; encoding: [0x00,0x9c,0x1c,0x4f]
1512 ; CHECK: sqrshrn2.4s v0, v0, #6 ; encoding: [0x00,0x9c,0x3a,0x4f]
1662 sqrshrn2 v8.16b, v9.8h, #2
1664 sqrshrn2 v6.8h, v7.4s, #4
1666 sqrshrn2 v4.4s, v5.2d, #6
1731 ; CHECK: sqrshrn2.16b v8, v9, #2 ; encoding: [0x28,0x9d,0x0e,0x4f]
[all …]
|
| D | neon-diagnostics.s | 1984 sqrshrn2 v0.16b, v1.8h, #17
1985 sqrshrn2 v0.8h, v1.4s, #33
1986 sqrshrn2 v0.4s, v1.2d, #65
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-neon-simd-shift.ll | 500 ; CHECK: sqrshrn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, #3
511 ; CHECK: sqrshrn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, #9
522 ; CHECK: sqrshrn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, #19
|
| D | arm64-vshift.ll | 907 ;CHECK: sqrshrn2.16b v0, {{v[0-9]+}}, #1
917 ;CHECK: sqrshrn2.8h v0, {{v[0-9]+}}, #1
927 ;CHECK: sqrshrn2.4s v0, {{v[0-9]+}}, #1
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 2062 # CHECK: sqrshrn2.16b v0, v0, #6
2064 # CHECK: sqrshrn2.8h v0, v0, #12
2066 # CHECK: sqrshrn2.4s v0, v0, #26
|
| D | neon-instructions.txt | 1053 # CHECK: sqrshrn2 v0.16b, v1.8h, #3
1054 # CHECK: sqrshrn2 v0.8h, v1.4s, #3
1055 # CHECK: sqrshrn2 v0.4s, v1.2d, #3
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 28167 sqrshrn2 v4.4s, v29.2d, #1 177f40826b7b3ef269cc6140e1adef95 bfa191d529db81c8c7ed9be1774bf2af 8…
28168 sqrshrn2 v4.4s, v29.2d, #17 37abfa5fb667fb774a5bde43bf62d53e 09987bb430de1ca7ce17be0e3fd7dc4a …
28169 sqrshrn2 v4.4s, v29.2d, #32 e2f5b717956336f72acab44367aa4dc7 76a441a5e4688e396e1a1171e86faf7e …
28173 sqrshrn2 v4.8h, v29.4s, #1 80bb5af96966935026d2ffae64046529 0c23749df956350a551ec096dab8a6bc 7…
28174 sqrshrn2 v4.8h, v29.4s, #9 84b5ce12d4cce6dca3c62fc49a4a5931 c9b82707b0a37640897da52689a6ad07 8…
28175 sqrshrn2 v4.8h, v29.4s, #16 540c85451481f7a460daf717da632059 eba1f7c454b7ce6995f5fb2c5bdedf2a …
28179 sqrshrn2 v4.16b, v29.8h, #1 03889193e9e92c9a4df78c50b883f1b7 d115d368ab4a8e17ad4e335f6e2dcfa5 8…
28180 sqrshrn2 v4.16b, v29.8h, #4 83c6d1de9260f6248d635ad286fc741f becfd1657b7053375da39a6ea36e0549 8…
28181 sqrshrn2 v4.16b, v29.8h, #8 d90d2ce5a67db46585d032fbff5585b1 1b768a944ad93e989a8185284416a7d4 1…
|
| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.h | 2233 LogicVRegister sqrshrn2(VectorFormat vform,
|
| D | macro-assembler-a64.h | 2378 V(sqrshrn2, Sqrshrn2) \
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| D | assembler-a64.h | 3271 void sqrshrn2(const VRegister& vd,
|
| D | simulator-a64.cc | 3853 sqrshrn2(vf, rd, rn, right_shift); in VisitNEONShiftImmediate()
|
| D | logic-a64.cc | 2721 LogicVRegister Simulator::sqrshrn2(VectorFormat vform, in sqrshrn2() function in vixl::Simulator
|
| D | assembler-a64.cc | 4408 void Assembler::sqrshrn2(const VRegister& vd, in sqrshrn2() function in vixl::Assembler
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 3474 void sqrshrn2(const VRegister& vd,
|