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Searched refs:srshr (Results 1 – 22 of 22) sorted by relevance

/external/llvm/test/MC/AArch64/
Dneon-simd-shift.s83 srshr v0.8b, v1.8b, #3
84 srshr v0.4h, v1.4h, #3
85 srshr v0.2s, v1.2s, #3
86 srshr v0.16b, v1.16b, #3
87 srshr v0.8h, v1.8h, #3
88 srshr v0.4s, v1.4s, #3
89 srshr v0.2d, v1.2d, #3
Dneon-scalar-shift-imm.s22 srshr d19, d18, #7
Darm64-advsimd.s1224 srshr d0, d0, #1 define
1273 ; CHECK: srshr d0, d0, #1 ; encoding: [0x00,0x24,0x7f,0x5f]
1380 srshr.8b v0, v0, #1
1381 srshr.16b v0, v0, #2
1382 srshr.4h v0, v0, #3
1383 srshr.8h v0, v0, #4
1384 srshr.2s v0, v0, #5
1385 srshr.4s v0, v0, #6
1386 srshr.2d v0, v0, #7
1552 ; CHECK: srshr.8b v0, v0, #1 ; encoding: [0x00,0x24,0x0f,0x0f]
[all …]
Dneon-diagnostics.s1510 srshr v0.8b, v1.8h, #3
1511 srshr v0.4h, v1.4s, #3
1512 srshr v0.2s, v1.2d, #3
1513 srshr v0.16b, v1.16b, #9
1514 srshr v0.8h, v1.8h, #17
1515 srshr v0.4s, v1.4s, #33
1516 srshr v0.2d, v1.2d, #65
4933 srshr d19, d18, #99
/external/libavc/common/armv8/
Dih264_iquant_itrans_recon_av8.s219 srshr v20.8h, v20.8h, #6
220 srshr v22.8h, v22.8h, #6
411 srshr v20.4h, v20.4h, #6
412 srshr v21.4h, v21.4h, #6
413 srshr v22.4h, v22.4h, #6
414 srshr v23.4h, v23.4h, #6
737 srshr v0.8h, v0.8h, #6
738 srshr v1.8h, v1.8h, #6
739 srshr v2.8h, v2.8h, #6
740 srshr v3.8h, v3.8h, #6
[all …]
Dih264_iquant_itrans_recon_dc_av8.s146 srshr v0.8h, v0.8h, #6
230 srshr v0.8h, v0.8h, #6
355 srshr v0.8h, v0.8h, #6
Dih264_deblk_chroma_av8.s538 srshr v14.8h, v14.8h, #3
539 srshr v16.8h, v16.8h, #3 //(((q0 - p0) << 2) + (p1 - q1) + 4) >> 3)
Dih264_intra_pred_luma_16x16_av8.s465 srshr v0.2s, v0.2s, #6 // i_b = D0[0]
/external/libhevc/common/arm64/
Dihevc_deblk_chroma_horz.s145 srshr v6.8h, v6.8h,#3
Dihevc_deblk_chroma_vert.s160 srshr v6.8h, v4.8h,#3
Dihevc_deblk_luma_horz.s488 srshr v10.8h, v10.8h,#4
Dihevc_deblk_luma_vert.s478 srshr v16.8h,v16.8h,#4
/external/llvm/test/MC/Disassembler/AArch64/
Darm64-advsimd.txt1830 # CHECK: srshr d0, d0, #63
2106 # CHECK: srshr.8b v0, v0, #7
2107 # CHECK: srshr.16b v0, v0, #6
2108 # CHECK: srshr.4h v0, v0, #13
2109 # CHECK: srshr.8h v0, v0, #12
2110 # CHECK: srshr.2s v0, v0, #27
2111 # CHECK: srshr.4s v0, v0, #26
2112 # CHECK: srshr.2d v0, v0, #57
Dneon-instructions.txt792 # CHECK: srshr v0.8b, v1.8b, #3
793 # CHECK: srshr v0.4h, v1.4h, #3
794 # CHECK: srshr v0.2s, v1.2s, #3
795 # CHECK: srshr v0.16b, v1.16b, #3
796 # CHECK: srshr v0.8h, v1.8h, #3
797 # CHECK: srshr v0.4s, v1.4s, #3
798 # CHECK: srshr v0.2d, v1.2d, #3
1828 # CHECK: srshr d19, d18, #7
/external/llvm/test/CodeGen/AArch64/
Darm64-vshift.ll499 ;CHECK: srshr.8b
507 ;CHECK: srshr.4h
515 ;CHECK: srshr.2s
523 ;CHECK: srshr.16b
531 ;CHECK: srshr.8h
539 ;CHECK: srshr.4s
547 ;CHECK: srshr.2d
/external/valgrind/none/tests/arm64/
Dfp_and_simd.stdout.exp28571 srshr d5, d28, #1 42213084af47e8b4c87fdaa0b56dd538 11ad4cd223e8e76bb97ee1df29edf322 00000000000…
28572 srshr d5, d28, #32 5aa4e9545ed81c36b219c002f92c0b7b d1b003e92ce6e82c88a97bf134195b7d 0000000000…
28573 srshr d5, d28, #64 f51bde161bd1874b946b37797ed58c35 aca0ce2b5bc3783ae6857c5199a86509 0000000000…
28577 srshr v6.2d, v27.2d, #1 aa2047540c6bc6e67a5e165c2a406896 b832d6c73ecd88a7eff58478ceee873f dc19…
28578 srshr v6.2d, v27.2d, #32 aed0188695c3be8e46cec161eedd3e31 9ab06c5ff8ffb2ce1585e88c6fa73571 fff…
28579 srshr v6.2d, v27.2d, #64 0ead3d23843984c3e02f15f44b1df73c 6f532d992fc70338a3fdcd66c17b1eca 000…
28580 srshr v6.4s, v27.4s, #1 2997170a38ae7863ab6171f6a1e0f297 98fc7b554407dac7f83f92e5254aa12c cc7e…
28581 srshr v6.4s, v27.4s, #16 5f6e051a1202fb500444354551069021 7489b573969e9759742998ebfaf31e76 000…
28582 srshr v6.4s, v27.4s, #32 1011683571156c684db8c2c1ba6f30bc 63da3cd3856b9bcf789c3e56a058f687 000…
28583 srshr v6.2s, v27.2s, #1 9d629f39b6c62b8ce59d774c3cfa3246 c6d16f55725045096378e40778578840 0000…
[all …]
/external/vixl/test/
Dtest-simulator-a64.cc3864 DEFINE_TEST_NEON_2OPIMM(srshr, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
3897 DEFINE_TEST_NEON_2OPIMM_SCALAR_D(srshr, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
/external/vixl/src/vixl/a64/
Dmacro-assembler-a64.h2388 V(srshr, Srshr) \
Dassembler-a64.h3186 void srshr(const VRegister& vd,
Dassembler-a64.cc4304 void Assembler::srshr(const VRegister& vd, in srshr() function in vixl::Assembler
/external/vixl/doc/
Dsupported-instructions.md3632 void srshr(const VRegister& vd,
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td4430 defm SRSHR : SIMDScalarRShiftD< 0, 0b00100, "srshr", AArch64srshri>;
4482 defm SRSHR : SIMDVectorRShiftBHSD<0, 0b00100, "srshr", AArch64srshri>;