Searched refs:stlxrh (Results 1 – 14 of 14) sorted by relevance
/external/llvm/test/CodeGen/AArch64/ |
D | atomic-ops.ll | 127 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 367 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 445 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], w0, [x[[ADDR]]] 533 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 917 ; CHECK: stlxrh [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x[[ADDR]]]
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D | arm64-ldxr-stxr.ll | 244 ; CHECK: stlxrh w0, w1, [x2]
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/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 527 stlxrh w8, w7, [x1] 534 ; CHECK: stlxrh w8, w7, [x1] ; encoding: [0x27,0xfc,0x08,0x48]
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D | basic-a64-diagnostics.s | 1843 stlxrh w10, w11, [w2]
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D | basic-a64-instructions.s | 2273 stlxrh w15, w16, [x17,#0]
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/external/vixl/ |
D | README.md | 110 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 515 # CHECK: stlxrh w8, w7, [x1]
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D | basic-a64-instructions.txt | 1843 #CHECK: stlxrh w10, w1, [x1]
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/external/vixl/test/ |
D | test-disasm-a64.cc | 1769 COMPARE(stlxrh(w20, w21, MemOperand(x22)), "stlxrh w20, w21, [x22]"); in TEST() 1770 COMPARE(stlxrh(x23, w24, MemOperand(sp)), "stlxrh w23, w24, [sp]"); in TEST() 1771 COMPARE(stlxrh(w25, x26, MemOperand(x27)), "stlxrh w25, w26, [x27]"); in TEST() 1772 COMPARE(stlxrh(x28, x29, MemOperand(sp)), "stlxrh w28, w29, [sp]"); in TEST()
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/external/vixl/src/vixl/a64/ |
D | macro-assembler-a64.h | 1824 stlxrh(rs, rt, dst); in Stlxrh()
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D | assembler-a64.h | 1792 void stlxrh(const Register& rs, const Register& rt, const MemOperand& dst);
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D | assembler-a64.cc | 1748 void Assembler::stlxrh(const Register& rs, in stlxrh() function in vixl::Assembler
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/external/vixl/doc/ |
D | supported-instructions.md | 1127 void stlxrh(const Register& rs, const Register& rt, const MemOperand& dst)
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2298 def STLXRH : StoreExclusive<0b01, 0, 0, 0, 1, GPR32, "stlxrh">;
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