Searched refs:subhn2 (Results 1 – 12 of 12) sorted by relevance
/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vsub.ll | 33 ;CHECK-NEXT: subhn2.16b 43 ;CHECK-NEXT: subhn2.8h 53 ;CHECK-NEXT: subhn2.4s
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D | arm64-vadd.ll | 909 ;CHECK: subhn2.16b 921 ;CHECK: subhn2.8h 933 ;CHECK: subhn2.4s
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D | arm64-neon-3vdiff.ll | 871 ; CHECK: subhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 885 ; CHECK: subhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 899 ; CHECK: subhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d 913 ; CHECK: subhn2 {{v[0-9]+}}.16b, {{v[0-9]+}}.8h, {{v[0-9]+}}.8h 927 ; CHECK: subhn2 {{v[0-9]+}}.8h, {{v[0-9]+}}.4s, {{v[0-9]+}}.4s 941 ; CHECK: subhn2 {{v[0-9]+}}.4s, {{v[0-9]+}}.2d, {{v[0-9]+}}.2d
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.c | 2732 GEN_BINARY_TEST(subhn2, 4s, 2d, 2d) 2734 GEN_BINARY_TEST(subhn2, 8h, 4s, 4s) 2736 GEN_BINARY_TEST(subhn2, 16b, 8h, 8h)
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D | fp_and_simd.stdout.exp | 26954 subhn2 v9.4s, v7.2d, v8.2d 2efa01aa3903307dd3404a10b6f1dddb 996996e5f282fdf829702b81a8cb1a7e 959… 26956 subhn2 v9.8h, v7.4s, v8.4s da4a132baf33d5cc1cab453654e3d2df ee3bcbea4c062a2f56553929ae748f90 ec0… 26958 subhn2 v9.16b, v7.8h, v8.8h 5175319fe6fef8bbb66909e2ea5a3304 2495b1611ef31ba52a7cf514a2aef5a2 2c…
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/external/vixl/src/vixl/a64/ |
D | simulator-a64.h | 2268 V(subhn2) \
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D | macro-assembler-a64.h | 2169 V(subhn2, Subhn2) \
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D | assembler-a64.h | 3501 void subhn2(const VRegister& vd,
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D | simulator-a64.cc | 2804 case NEON_SUBHN2: subhn2(vf, rd, rn, rm); break; in VisitNEON3Different()
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D | logic-a64.cc | 3358 LogicVRegister Simulator::subhn2(VectorFormat vform, in subhn2() function in vixl::Simulator
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D | assembler-a64.cc | 2415 V(subhn2, NEON_SUBHN2, vd.IsQ()) \
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/external/vixl/doc/ |
D | supported-instructions.md | 3859 void subhn2(const VRegister& vd,
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