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Searched refs:subnr (Results 1 – 6 of 6) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_eu.h78 GLuint subnr:5; /* :1 in align16 */ member
188 GLuint subnr, in brw_reg() argument
207 reg.subnr = subnr * type_sz(type); in brw_reg()
232 GLuint subnr ) in brw_vec16_reg() argument
236 subnr, in brw_vec16_reg()
248 GLuint subnr ) in brw_vec8_reg() argument
252 subnr, in brw_vec8_reg()
264 GLuint subnr ) in brw_vec4_reg() argument
268 subnr, in brw_vec4_reg()
280 GLuint subnr ) in brw_vec2_reg() argument
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Dbrw_eu_debug.c63 hwreg.subnr == 0 && in brw_print_reg()
77 printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4); in brw_print_reg()
86 hwreg.subnr / type_sz(hwreg.type), in brw_print_reg()
Dbrw_wm_debug.c75 if ((hw_reg.nr&1) || hw_reg.subnr) { in brw_wm_print_ref()
76 printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr); in brw_wm_print_ref()
Dbrw_eu_emit.c121 insn->bits1.da1.dest_subreg_nr = dest.subnr; in brw_set_dest()
127 insn->bits1.da16.dest_subreg_nr = dest.subnr / 16; in brw_set_dest()
134 insn->bits1.ia1.dest_subreg_nr = dest.subnr; in brw_set_dest()
264 insn->bits2.da1.src0_subreg_nr = reg.subnr; in brw_set_src0()
268 insn->bits2.da16.src0_subreg_nr = reg.subnr / 16; in brw_set_src0()
273 insn->bits2.ia1.src0_subreg_nr = reg.subnr; in brw_set_src0()
346 insn->bits3.da1.src1_subreg_nr = reg.subnr; in brw_set_src1()
350 insn->bits3.da16.src1_subreg_nr = reg.subnr / 16; in brw_set_src1()
758 return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0); in get_3src_subreg_nr()
760 return reg.subnr / 4; in get_3src_subreg_nr()
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Dbrw_vs_emit.c1079 const_reg.subnr = 0; in get_constant()
1174 GLuint byte_offset = arg.nr * 32 + arg.subnr + offset * reg_size; in deref()
1212 GLuint byte_offset = base.nr * 32 + base.subnr; in move_to_reladdr_dst()
1759 prev_insn->bits1.da16.dest_subreg_nr == val.subnr / 16 && in accumulator_contains()
Dbrw_gs_emit.c448 vertex_slot.subnr = (slot % 2) * 16; in gen6_sol_program()