| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | SIRegisterInfo.cpp | 21 const TargetInstrInfo &tii) in SIRegisterInfo() argument
22 : AMDGPURegisterInfo(tm, tii), in SIRegisterInfo()
24 TII(tii) in SIRegisterInfo()
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| D | AMDGPURegisterInfo.cpp | 20 const TargetInstrInfo &tii) in AMDGPURegisterInfo() argument
23 TII(tii) in AMDGPURegisterInfo()
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| D | R600RegisterInfo.cpp | 21 const TargetInstrInfo &tii) in R600RegisterInfo() argument
22 : AMDGPURegisterInfo(tm, tii), in R600RegisterInfo()
24 TII(tii) in R600RegisterInfo()
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| D | AMDILCFGStructurizer.cpp | 1903 const AMDGPUInstrInfo *tii = in addLoopEndbranchBlock() local
1971 tii->getMovImmInstr(preBranchBlk->getParent(), preValReg, in addLoopEndbranchBlock()
1977 BuildMI(preBranchBlk, DL, tii->get(tii->getIEQOpcode()), condResReg) in addLoopEndbranchBlock()
1980 BuildMI(preBranchBlk, DL, tii->get(AMDGPU::BRANCH_COND_i32)) in addLoopEndbranchBlock()
3013 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrBefore() local
3015 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrBefore()
3036 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrEnd() local
3038 ->CreateMachineInstr(tii->get(newOpcode), DL); in insertInstrEnd()
3050 const TargetInstrInfo *tii = passRep->getTargetInstrInfo(); in insertInstrBefore() local
3053 blk->getParent()->CreateMachineInstr(tii->get(newOpcode), in insertInstrBefore()
[all …]
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| D | SIRegisterInfo.h | 30 SIRegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
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| D | R600RegisterInfo.h | 30 R600RegisterInfo(AMDGPUTargetMachine &tm, const TargetInstrInfo &tii);
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| D | AMDGPURegisterInfo.h | 36 AMDGPURegisterInfo(TargetMachine &tm, const TargetInstrInfo &tii);
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| /external/llvm/lib/CodeGen/ |
| D | TargetSchedule.cpp | 55 const TargetInstrInfo *tii) { in init() argument
58 TII = tii; in init()
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| D | BranchFolding.h | 34 const TargetInstrInfo *tii,
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| D | BranchFolding.cpp | 190 const TargetInstrInfo *tii, in OptimizeFunction() argument
193 if (!tii) return false; in OptimizeFunction()
197 TII = tii; in OptimizeFunction()
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| D | MachineScheduler.cpp | 1256 LoadClusterMutation(const TargetInstrInfo *tii, in LoadClusterMutation() argument
1258 : TII(tii), TRI(tri) {} in LoadClusterMutation()
1353 MacroFusion(const TargetInstrInfo *tii): TII(tii) {} in MacroFusion() argument
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| /external/llvm/include/llvm/CodeGen/ |
| D | TargetSchedule.h | 52 const TargetInstrInfo *tii);
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| /external/doclava/src/com/google/doclava/ |
| D | Stubs.java | 262 for (TypeInfo tii : ti.typeArguments()) { in findHiddenClasses()
264 if (tii.qualifiedTypeName() != ti.qualifiedTypeName()) { in findHiddenClasses()
265 ClassInfo hiddenClass = findHiddenClasses(tii); in findHiddenClasses()
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | ScheduleDAGRRList.cpp | 1653 const TargetInstrInfo *tii, in RegReductionPQBase() argument
1658 MF(mf), TII(tii), TRI(tri), TLI(tli), scheduleDAG(nullptr) { in RegReductionPQBase()
1773 const TargetInstrInfo *tii, in RegReductionPriorityQueue() argument
1777 tii, tri, tli), in RegReductionPriorityQueue()
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| /external/hyphenation-patterns/nb/ |
| D | hyph-nb.pat.txt | 23279 2tii
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| /external/hyphenation-patterns/nn/ |
| D | hyph-nn.pat.txt | 23279 2tii
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