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Searched refs:tile_x (Results 1 – 25 of 29) sorted by relevance

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/external/skia/tools/
Dbench_pictures_cfg_helper.py16 def TileArgs(tile_x, tile_y, timeIndividualTiles=True): argument
17 config = {'mode': ['tile', str(tile_x), str(tile_y)]}
31 def TiledBitmapConfig(tile_x, tile_y, timeIndividualTiles=True, **kwargs): argument
32 return BitmapConfig(**dict(TileArgs(tile_x, tile_y,
36 def TiledGPUConfig(tile_x, tile_y, **kwargs): argument
37 return GPUConfig(**dict(TileArgs(tile_x, tile_y).items() + kwargs.items()))
40 def TiledConfig(tile_x, tile_y, timeIndividualTiles=True, **kwargs): argument
41 return Config(**dict(TileArgs(tile_x, tile_y,
63 def CopyTilesConfig(tile_x, tile_y, **kwargs): argument
64 return BitmapConfig(mode=['copyTile', str(tile_x), str(tile_y)], **kwargs)
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/external/mesa3d/src/mesa/drivers/dri/i965/
Dgen7_misc_state.c109 uint32_t tile_x = 0, tile_y = 0; in emit_depthbuffer() local
119 tile_x = draw_x & tile_mask_x; in emit_depthbuffer()
137 tile_x &= ~7; in emit_depthbuffer()
142 dw3 = ((srb->Base.Base.Width + tile_x - 1) << 4) | in emit_depthbuffer()
152 OUT_BATCH(tile_x | (tile_y << 16)); in emit_depthbuffer()
157 uint32_t tile_x, tile_y, offset; in emit_depthbuffer() local
161 tile_x = draw_x & tile_mask_x; in emit_depthbuffer()
179 tile_x &= ~7; in emit_depthbuffer()
201 OUT_BATCH((((drb->Base.Base.Width + tile_x) - 1) << 4) | in emit_depthbuffer()
204 OUT_BATCH(tile_x | (tile_y << 16)); in emit_depthbuffer()
Dbrw_misc_state.c372 uint32_t tile_x, tile_y; in emit_depthbuffer() local
398 tile_x = draw_x & tile_mask_x; in emit_depthbuffer()
417 tile_x &= ~7; in emit_depthbuffer()
430 OUT_BATCH(((stencil_irb->Base.Base.Width + tile_x - 1) << 6) | in emit_depthbuffer()
435 OUT_BATCH(tile_x | (tile_y << 16)); in emit_depthbuffer()
437 assert(tile_x == 0 && tile_y == 0); in emit_depthbuffer()
446 uint32_t tile_x, tile_y, offset; in emit_depthbuffer() local
456 tile_x = draw_x & tile_mask_x; in emit_depthbuffer()
474 tile_x &= ~7; in emit_depthbuffer()
494 (((depth_irb->Base.Base.Width + tile_x) - 1) << 6) | in emit_depthbuffer()
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Dgen7_blorp.cpp153 uint32_t tile_x, tile_y; in gen7_blorp_emit_surface_state() local
171 surf->ss1.base_addr = surface->compute_tile_offsets(&tile_x, &tile_y); in gen7_blorp_emit_surface_state()
177 assert(tile_x % 4 == 0); in gen7_blorp_emit_surface_state()
179 surf->ss5.x_offset = tile_x / 4; in gen7_blorp_emit_surface_state()
589 uint32_t tile_x = draw_x & tile_mask_x; in gen7_blorp_emit_depth_stencil_config() local
611 tile_x &= ~7; in gen7_blorp_emit_depth_stencil_config()
628 OUT_BATCH((params->depth.width + tile_x - 1) << 4 | in gen7_blorp_emit_depth_stencil_config()
631 OUT_BATCH(tile_x | in gen7_blorp_emit_depth_stencil_config()
Dgen6_blorp.cpp427 uint32_t tile_x, tile_y; in gen6_blorp_emit_surface_state() local
439 surf[1] = (surface->compute_tile_offsets(&tile_x, &tile_y) + in gen6_blorp_emit_surface_state()
461 assert(tile_x % 4 == 0); in gen6_blorp_emit_surface_state()
463 surf[5] = ((tile_x / 4) << BRW_SURFACE_X_OFFSET_SHIFT | in gen6_blorp_emit_surface_state()
841 uint32_t tile_x = draw_x & tile_mask_x; in gen6_blorp_emit_depth_stencil_config() local
863 tile_x &= ~7; in gen6_blorp_emit_depth_stencil_config()
884 (params->depth.width + tile_x - 1) << 6 | in gen6_blorp_emit_depth_stencil_config()
887 OUT_BATCH(tile_x | in gen6_blorp_emit_depth_stencil_config()
Dbrw_blorp.cpp125 brw_blorp_surface_info::compute_tile_offsets(uint32_t *tile_x, in compute_tile_offsets() argument
134 *tile_x = x_offset & mask_x; in compute_tile_offsets()
Dintel_span.c75 uint32_t tile_x = x / tile_width; in intel_offset_S8() local
83 + tile_x * tile_size in intel_offset_S8()
Dgen7_wm_surface_state.c510 uint32_t tile_x, tile_y; in gen7_update_renderbuffer_surface() local
552 surf->ss1.base_addr = intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y); in gen7_update_renderbuffer_surface()
559 assert(tile_x % 4 == 0); in gen7_update_renderbuffer_surface()
561 surf->ss5.x_offset = tile_x / 4; in gen7_update_renderbuffer_surface()
Dbrw_wm_surface_state.c1125 uint32_t tile_x, tile_y; in brw_update_renderbuffer_surface() local
1130 intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y); in brw_update_renderbuffer_surface()
1132 if (tile_x != 0 || tile_y != 0) { in brw_update_renderbuffer_surface()
1195 surf[1] = (intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y) + in brw_update_renderbuffer_surface()
1206 assert(brw->has_surface_tile_offset || (tile_x == 0 && tile_y == 0)); in brw_update_renderbuffer_surface()
1210 assert(tile_x % 4 == 0); in brw_update_renderbuffer_surface()
1212 surf[5] = ((tile_x / 4) << BRW_SURFACE_X_OFFSET_SHIFT | in brw_update_renderbuffer_surface()
Dbrw_blorp.h107 uint32_t compute_tile_offsets(uint32_t *tile_x, uint32_t *tile_y) const;
Dintel_fbo.c578 uint32_t *tile_x, in intel_renderbuffer_tile_offsets() argument
586 *tile_x = irb->draw_x & mask_x; in intel_renderbuffer_tile_offsets()
/external/webp/src/dsp/
Dlossless.c603 int tile_x, int tile_y, int bits, in GetBestPredictorForTile() argument
607 const int col_start = tile_x << bits; in GetBestPredictorForTile()
652 int tile_x, int tile_y, int bits, int mode, in CopyTileWithPrediction() argument
655 const int col_start = tile_x << bits; in CopyTileWithPrediction()
700 int tile_x; in VP8LResidualImage() local
707 for (tile_x = 0; tile_x < tiles_per_row; ++tile_x) { in VP8LResidualImage()
710 const int tile_x_offset = tile_x * max_tile_size; in VP8LResidualImage()
715 pred = GetBestPredictorForTile(width, height, tile_x, tile_y, bits, in VP8LResidualImage()
718 image[tile_y * tiles_per_row + tile_x] = 0xff000000u | (pred << 8); in VP8LResidualImage()
719 CopyTileWithPrediction(width, height, tile_x, tile_y, bits, pred, in VP8LResidualImage()
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/external/mesa3d/src/mesa/drivers/dri/intel/
Dintel_span.c75 uint32_t tile_x = x / tile_width; in intel_offset_S8() local
83 + tile_x * tile_size in intel_offset_S8()
Dintel_fbo.h166 uint32_t *tile_x,
Dintel_fbo.c578 uint32_t *tile_x, in intel_renderbuffer_tile_offsets() argument
586 *tile_x = irb->draw_x & mask_x; in intel_renderbuffer_tile_offsets()
/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_span.c75 uint32_t tile_x = x / tile_width; in intel_offset_S8() local
83 + tile_x * tile_size in intel_offset_S8()
Dintel_fbo.c578 uint32_t *tile_x, in intel_renderbuffer_tile_offsets() argument
586 *tile_x = irb->draw_x & mask_x; in intel_renderbuffer_tile_offsets()
/external/libvncserver/x11vnc/
Dxdamage.c125 dt_x = w / tile_x; in record_desired_xdamage_rect()
149 } else if (0 && wh_min < tile_x/4 && wh_max > 30 * wh_min) { in record_desired_xdamage_rect()
161 nt_x1 = nfix( (x)/tile_x, ntiles_x); in record_desired_xdamage_rect()
162 nt_x2 = nfix((x+w)/tile_x, ntiles_x); in record_desired_xdamage_rect()
Dscan.c133 ntiles_x = (dpy_x - 1)/tile_x + 1; in initialize_tiles()
488 if (! shm_create(&tile_row_shm[i], &tile_row[i], tile_x * i, in initialize_polling_images()
603 tw = tile_x; in hint_updates()
607 create_tile_hint( x * tile_x + tx, in hint_updates()
611 extend_tile_hint( x * tile_x + tx, in hint_updates()
1742 x = tx * tile_x; in copy_tiles()
1746 if ( size_x > tile_x * nt ) { in copy_tiles()
1747 size_x = tile_x * nt; in copy_tiles()
1748 width1 = tile_x; in copy_tiles()
1749 width2 = tile_x; in copy_tiles()
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Dx11vnc_defs.c151 int tile_x = 32; variable
Dxinerama.c159 x1 = tx * tile_x; in blackout_tiles()
161 x2 = x1 + tile_x; in blackout_tiles()
Dx11vnc.h579 extern int tile_x;
/external/skia/bench/
Dtile_analyze.py145 [tile_x, tile_y] = [int(i) for i in tile_size.split('x')]
147 viewport_cols = int(math.ceil(viewport_x * 1.0 / tile_x))
/external/mesa3d/src/gallium/drivers/llvmpipe/
Dlp_rast.c340 const unsigned tile_x = task->x, tile_y = task->y; in lp_rast_shade_tile() local
367 tile_x + x, tile_y + y); in lp_rast_shade_tile()
370 depth = lp_rast_get_depth_block_pointer(task, tile_x + x, tile_y + y); in lp_rast_shade_tile()
375 tile_x + x, tile_y + y, in lp_rast_shade_tile()
/external/libvncserver/webclients/novnc/include/
Ddisplay.js36 tile_x = 0,
434 tile_x = x;
488 that.fillRect(tile_x + x, tile_y + y, w, h, color);
495 c_ctx.putImageData(tile, tile_x - viewport.x, tile_y - viewport.y);

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