/external/llvm/test/MC/AArch64/ |
D | neon-max-min-pairwise.s | 53 uminp v0.8b, v1.8b, v2.8b 54 uminp v0.16b, v1.16b, v2.16b 55 uminp v0.4h, v1.4h, v2.4h 56 uminp v0.8h, v1.8h, v2.8h 57 uminp v0.2s, v1.2s, v2.2s 58 uminp v0.4s, v1.4s, v2.4s
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D | arm64-advsimd.s | 362 uminp.8b v0, v0, v0 433 ; CHECK: uminp.8b v0, v0, v0 ; encoding: [0x00,0xac,0x20,0x2e]
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D | neon-diagnostics.s | 1147 uminp v0.2s, v1.2s, v2.8b
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vmax.ll | 436 ;CHECK: uminp.8b 439 %tmp3 = call <8 x i8> @llvm.aarch64.neon.uminp.v8i8(<8 x i8> %tmp1, <8 x i8> %tmp2) 445 ;CHECK: uminp.16b 448 %tmp3 = call <16 x i8> @llvm.aarch64.neon.uminp.v16i8(<16 x i8> %tmp1, <16 x i8> %tmp2) 454 ;CHECK: uminp.4h 457 %tmp3 = call <4 x i16> @llvm.aarch64.neon.uminp.v4i16(<4 x i16> %tmp1, <4 x i16> %tmp2) 463 ;CHECK: uminp.8h 466 %tmp3 = call <8 x i16> @llvm.aarch64.neon.uminp.v8i16(<8 x i16> %tmp1, <8 x i16> %tmp2) 472 ;CHECK: uminp.2s 475 %tmp3 = call <2 x i32> @llvm.aarch64.neon.uminp.v2i32(<2 x i32> %tmp1, <2 x i32> %tmp2) [all …]
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D | arm64-uminv.ll | 115 ; CHECK: uminp.2s v[[REGNUM:[0-9]+]], v1, v1
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/external/valgrind/none/tests/arm64/ |
D | fp_and_simd.c | 3431 GEN_BINARY_TEST(uminp, 4s, 4s, 4s) 3432 GEN_BINARY_TEST(uminp, 2s, 2s, 2s) 3433 GEN_BINARY_TEST(uminp, 8h, 8h, 8h) 3434 GEN_BINARY_TEST(uminp, 4h, 4h, 4h) 3435 GEN_BINARY_TEST(uminp, 16b, 16b, 16b) 3436 GEN_BINARY_TEST(uminp, 8b, 8b, 8b)
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D | fp_and_simd.stdout.exp | 27593 uminp v9.4s, v7.4s, v8.4s 0df2aa662947f8bdac6e22eac1d4a614 f0936ea0566390c4b2e7aab2dfe4a51a 5663… 27594 uminp v9.2s, v7.2s, v8.2s f64057c0e83d509913194b058eaee81a 2ccb974d3189e3a021721f57a217366c 0000… 27595 uminp v9.8h, v7.8h, v8.8h e79b083039a6caced193ecf5bfdcf70f aef9a0872691e3776e8f8e39a4a4f19c a087… 27596 uminp v9.4h, v7.4h, v8.4h 92e69dc8d8765ae4a35dddbd101ded4b 03345d9abf3f631f2e0e86045abc3904 0000… 27597 uminp v9.16b, v7.16b, v8.16b ff6d9373d5930858d6c21ebccca67b45 1e57a4a0652d910c26e34875f81ffba3 1… 27598 uminp v9.8b, v7.8b, v8.8b 5cd4876f5877a9800d943be18d206604 4fa533775f7663361782801b39171c1d 0000…
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 583 # CHECK: uminp v1.8b, v15.8b, v22.8b 585 # CHECK: uminp v3.4h, v13.4h, v24.4h 587 # CHECK: uminp v5.2s, v11.2s, v26.2s
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D | arm64-advsimd.txt | 345 # CHECK: uminp.8b v0, v0, v0
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/external/vixl/src/vixl/a64/ |
D | simulator-a64.h | 2029 LogicVRegister uminp(VectorFormat vform,
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D | macro-assembler-a64.h | 2187 V(uminp, Uminp) \
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D | assembler-a64.h | 3137 void uminp(const VRegister& vd,
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D | simulator-a64.cc | 2697 case NEON_UMINP: uminp(vf, rd, rn, rm); break; in VisitNEON3Same()
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D | logic-a64.cc | 1554 LogicVRegister Simulator::uminp(VectorFormat vform, in uminp() function in vixl::Simulator
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D | assembler-a64.cc | 3198 V(uminp, NEON_UMINP, vd.IsVector() && !vd.IsLaneSizeD()) \
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/external/vixl/test/ |
D | test-simulator-a64.cc | 3760 DEFINE_TEST_NEON_3SAME_NO2D(uminp, Basic)
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/external/vixl/doc/ |
D | supported-instructions.md | 4175 void uminp(const VRegister& vd,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2786 defm UMINP : SIMDThreeSameVectorBHS<1,0b10101,"uminp", int_aarch64_neon_uminp>;
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