| /external/llvm/test/MC/AArch64/ |
| D | neon-simd-shift.s | 143 ursra v0.8b, v1.8b, #3
144 ursra v0.4h, v1.4h, #3
145 ursra v0.2s, v1.2s, #3
146 ursra v0.16b, v1.16b, #3
147 ursra v0.8h, v1.8h, #3
148 ursra v0.4s, v1.4s, #3
149 ursra v0.2d, v1.2d, #3
|
| D | neon-scalar-shift-imm.s | 57 ursra d18, d10, #13
|
| D | arm64-advsimd.s | 1242 ursra d0, d0, #1 define
1291 ; CHECK: ursra d0, d0, #1 ; encoding: [0x00,0x34,0x7f,0x7f]
1444 ursra.8b v0, v0, #1
1445 ursra.16b v0, v0, #2
1446 ursra.4h v0, v0, #3
1447 ursra.8h v0, v0, #4
1448 ursra.2s v0, v0, #5
1449 ursra.4s v0, v0, #6
1450 ursra.2d v0, v0, #7
1616 ; CHECK: ursra.8b v0, v0, #1 ; encoding: [0x00,0x34,0x0f,0x2f]
[all …]
|
| D | neon-diagnostics.s | 1609 ursra v0.8b, v1.8h, #3
1610 ursra v0.4h, v1.4s, #3
1611 ursra v0.2s, v1.2d, #3
1612 ursra v0.16b, v1.16b, #9
1613 ursra v0.8h, v1.8h, #17
1614 ursra v0.4s, v1.4s, #33
1615 ursra v0.2d, v1.2d, #65
4983 ursra d18, d10, #99
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-advsimd.txt | 1846 # CHECK: ursra d0, d0, #63
2170 # CHECK: ursra.8b v0, v0, #7
2171 # CHECK: ursra.16b v0, v0, #6
2172 # CHECK: ursra.4h v0, v0, #13
2173 # CHECK: ursra.8h v0, v0, #12
2174 # CHECK: ursra.2s v0, v0, #27
2175 # CHECK: ursra.4s v0, v0, #26
2176 # CHECK: ursra.2d v0, v0, #57
|
| D | neon-instructions.txt | 846 # CHECK: ursra v0.8b, v1.8b, #3
847 # CHECK: ursra v0.4h, v1.4h, #3
848 # CHECK: ursra v0.2s, v1.2s, #3
849 # CHECK: ursra v0.16b, v1.16b, #3
850 # CHECK: ursra v0.8h, v1.8h, #3
851 # CHECK: ursra v0.4s, v1.4s, #3
852 # CHECK: ursra v0.2d, v1.2d, #3
1858 # CHECK: ursra d18, d10, #13
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-vshift.ll | 1375 ;CHECK: ursra.8b v0, {{v[0-9]+}}, #1
1385 ;CHECK: ursra.4h v0, {{v[0-9]+}}, #1
1395 ;CHECK: ursra.2s v0, {{v[0-9]+}}, #1
1405 ;CHECK: ursra.16b v0, {{v[0-9]+}}, #1
1415 ;CHECK: ursra.8h v0, {{v[0-9]+}}, #1
1425 ;CHECK: ursra.4s v0, {{v[0-9]+}}, #1
1435 ;CHECK: ursra.2d v0, {{v[0-9]+}}, #1
|
| /external/valgrind/none/tests/arm64/ |
| D | fp_and_simd.stdout.exp | 28623 ursra d5, d28, #1 53b57c041e6f2038f0e51c6ce87ead3d c67d8f1b0845c18440c1148a5a5052ee 00000000000…
28624 ursra d5, d28, #32 833c3e696933f17d19c9aaccfa7d9eea ded005dc28fa3377b6be9001e037fad1 0000000000…
28625 ursra d5, d28, #64 bb48c208a4bff9a8e0d4bd2dbd41d542 9d4d3dedfce1c6f03797e120ad61228d 0000000000…
28647 ursra v6.2d, v27.2d, #1 e73670cb5ff6d914035227aa5d817429 f3d11afaf2d8dbdd22eaa3615cb797c9 611e…
28648 ursra v6.2d, v27.2d, #32 23b888bbe63dede832f065688aaaf32c 35eaded851428a37d37082b60f44566a 23b…
28649 ursra v6.2d, v27.2d, #64 5a87943573c47068d09fecd4f196f5bd 0a476e77ce63fff58dfe82f1130cef53 5a8…
28650 ursra v6.4s, v27.4s, #1 ec83f4186569c1733e401acff125d9bf d2c92bb8c81b9af6ad7602f2c8efc263 55e8…
28651 ursra v6.4s, v27.4s, #16 3a8c09461c0d40ebdbb15137ea37ff11 ee51747ba04abc1c95b662988fcc307c 3a8…
28652 ursra v6.4s, v27.4s, #32 a382339ef9904eae08d3f1ed3dacc793 bdbda9a0b5cfc545a59f02c5c785987d a38…
28653 ursra v6.2s, v27.2s, #1 8845d0ff5bd14a9d248559d149649224 9fed2b07678c13523b114357d0f85b45 0000…
[all …]
|
| /external/vixl/test/ |
| D | test-simulator-a64.cc | 3879 DEFINE_TEST_NEON_2OPIMM(ursra, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
3909 DEFINE_TEST_NEON_2OPIMM_SCALAR_D(ursra, Basic, TypeWidth) in DEFINE_TEST_NEON_2DIFF_FP_SCALAR_SD()
|
| /external/vixl/src/vixl/a64/ |
| D | simulator-a64.cc | 3731 case NEON_URSRA_scalar: ursra(vf, rd, rn, right_shift); break; in VisitNEONScalarShiftImmediate()
3793 case NEON_URSRA: ursra(vf, rd, rn, right_shift); break; in VisitNEONShiftImmediate()
|
| D | simulator-a64.h | 2131 LogicVRegister ursra(VectorFormat vform,
|
| D | macro-assembler-a64.h | 2400 V(ursra, Ursra) \
|
| D | assembler-a64.h | 3211 void ursra(const VRegister& vd,
|
| D | logic-a64.cc | 1804 LogicVRegister Simulator::ursra(VectorFormat vform, in ursra() function in vixl::Simulator
|
| D | assembler-a64.cc | 4344 void Assembler::ursra(const VRegister& vd, in ursra() function in vixl::Assembler
|
| /external/vixl/doc/ |
| D | supported-instructions.md | 4455 void ursra(const VRegister& vd,
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 4444 defm URSRA : SIMDScalarRShiftDTied< 1, 0b00110, "ursra",
4500 defm URSRA : SIMDVectorRShiftBHSDTied<1, 0b00110, "ursra",
|