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/external/libhevc/common/arm64/
Dihevc_intra_pred_chroma_dc.s193 dup v16.8b,w11
206 st2 {v16.8b, v17.8b}, [x2],#16
209 st2 {v16.8b, v17.8b}, [x5],#16
210 st2 {v16.8b, v17.8b}, [x8],#16
213 st2 {v16.8b, v17.8b}, [x10],#16
216 st2 {v16.8b, v17.8b}, [x2], x6
217 st2 {v16.8b, v17.8b}, [x5], x6
218 st2 {v16.8b, v17.8b}, [x8], x6
219 st2 {v16.8b, v17.8b}, [x10], x6
222 st2 {v16.8b, v17.8b}, [x2],#16
[all …]
Dihevc_deblk_luma_vert.s103 movi v16.8h, #0x2
234 mla v20.8h, v0.8h, v16.8h
286 mla v26.8h, v0.8h, v16.8h
295 umin v16.8b, v26.8b , v30.8b
299 umax v26.8b, v16.8b , v31.8b
420 uaddw v16.8h, v0.8h , v6.8b
422 rshrn v2.8b,v16.8h,#2
425 umin v16.8b, v2.8b , v27.8b
430 umax v5.8b, v16.8b , v28.8b
462 movi v16.8h, #0x3
[all …]
Dihevc_intra_pred_luma_vert.s185 …ld1 {v16.8b, v17.8b}, [x6] //ld for repl to cols src[2nt+1+col(0:15)] (0 ignored for …
223 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
224 bsl v3.8b, v25.8b , v16.8b
239 bsl v1.8b, v24.8b , v16.8b
240 bsl v6.8b, v25.8b , v16.8b
264 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
265 bsl v3.8b, v25.8b , v16.8b
277 bsl v1.8b, v24.8b , v16.8b
278 bsl v6.8b, v25.8b , v16.8b
294 bsl v18.8b, v24.8b , v16.8b //only select row values from q12(predpixel)
[all …]
Dihevc_intra_pred_luma_dc.s203 dup v16.8b, v18.b[0] //dc_val
263 bsl v20.8b, v3.8b , v16.8b //row 1 (prol)
272 bsl v21.8b, v3.8b , v16.8b //row 2 (prol)
280 bsl v20.8b, v3.8b , v16.8b //row 3 (prol)
288 bsl v21.8b, v3.8b , v16.8b //row 4 (prol)
296 bsl v20.8b, v3.8b , v16.8b //row 5 (prol)
305 bsl v21.8b, v3.8b , v16.8b //row 6 (prol)
314 bsl v20.8b, v3.8b , v16.8b //row 7 (prol)
333 st1 {v16.8b},[x2], x3
334 st1 {v16.8b},[x2], x3
[all …]
Dihevc_weighted_pred_uni.s196 smull v16.4s, v5.4h, v0.h[0] //vmull_n_s16(pi2_src_val2, (int16_t) wgt0) iv iteration
203 add v16.4s, v16.4s , v30.4s //vaddq_s32(i4_tmp2_t, tmp_lvl_shift_t) iv iteration
208 sshl v16.4s,v16.4s,v28.4s
217 sqxtun v16.4h, v16.4s //vqmovun_s32(sto_res_tmp1) iv iteration
221 uqxtn v16.8b, v16.8h //vqmovn_u16(sto_res_tmp3) iv iteration
224 st1 {v16.s}[0],[x6],x3 //store pu1_dst iv iteration
Dihevc_deblk_chroma_vert.s80 ld1 {v16.8b},[x8],x1
87 trn1 v29.8b, v16.8b, v4.8b
88 trn2 v4.8b, v16.8b, v4.8b
89 mov v16.d[0], v29.d[0]
103 trn1 v29.4h, v5.4h, v16.4h
104 trn2 v16.4h, v5.4h, v16.4h
123 trn1 v29.2s, v16.2s, v4.2s
124 trn2 v4.2s, v16.2s, v4.2s
125 mov v16.d[0], v29.d[0]
138 usubl v0.8h, v17.8b, v16.8b
[all …]
Dihevc_itrans_recon_32x32.s237 smull v16.4s, v10.4h, v0.h[0]
238 smlal v16.4s, v11.4h, v2.h[2]
272 smlal v16.4s, v12.4h, v5.h[0]
273 smlal v16.4s, v13.4h, v7.h[2]
307 smlsl v16.4s, v10.4h, v6.h[0]
308 smlsl v16.4s, v11.4h, v3.h[2]
346 smlsl v16.4s, v12.4h, v1.h[0]
347 smlsl v16.4s, v13.4h, v1.h[2]
383 smlsl v16.4s, v10.4h, v0.h[0]
384 smlsl v16.4s, v11.4h, v6.h[2]
[all …]
Dihevc_inter_pred_chroma_vert_w16inp_w16out.s123 dup v16.4h, v0.h[0] //coeff_0
144 smull v0.4s, v0.4h, v16.4h //vmull_s16(src_tmp1, coeff_0)
147 smull v7.4s, v2.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
191 smull v30.4s, v0.4h, v16.4h //vmull_s16(src_tmp1, coeff_0)
199 smull v28.4s, v1.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
212 smull v26.4s, v2.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
222 smull v24.4s, v3.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
238 smull v30.4s, v0.4h, v16.4h //vmull_s16(src_tmp1, coeff_0)
248 smull v28.4s, v1.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
261 smull v26.4s, v2.4h, v16.4h //vmull_s16(src_tmp2, coeff_0)
[all …]
/external/libhevc/decoder/arm64/
Dihevcd_fmt_conv_420sp_to_rgba8888.s227 UADDW v16.8h, v7.8h , v30.8b ////Q8 - HAS Y + R
236 sqxtun v16.8b, v16.8h
247 ZIP1 v27.8b, v16.8b, v17.8b
248 ZIP2 v17.8b, v16.8b, v17.8b
249 mov v16.d[0], v27.d[0]
260 mov v16.d[1], v17.d[0]
263 ZIP1 v27.8h, v14.8h, v16.8h
264 ZIP2 v26.8h, v14.8h, v16.8h
272 ZIP1 v16.4s, v26.4s, v19.4s
277 ST1 {v16.4s},[x2],#16
[all …]
/external/llvm/test/MC/AArch64/
Dneon-simd-post-ldst-multi-elem.s38 ld1 { v15.8h, v16.8h }, [x15], x2
42 ld1 { v15.4h, v16.4h }, [x15], x3
67 ld1 { v15.8h, v16.8h, v17.8h }, [x15], x2
71 ld1 { v15.4h, v16.4h, v17.4h }, [x15], x3
96 ld1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15], x2
100 ld1 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15], x4
125 ld2 { v15.8h, v16.8h }, [x15], x2
129 ld2 { v15.4h, v16.4h }, [x15], x3
151 ld3 { v15.8h, v16.8h, v17.8h }, [x15], x2
155 ld3 { v15.4h, v16.4h, v17.4h }, [x15], x3
[all …]
Dneon-simd-ldst-multi-elem.s29 st1 { v15.8h, v16.8h }, [x15]
33 st1 { v15.4h, v16.4h }, [x15]
46 st1 { v15.8h-v16.8h }, [x15]
50 st1 { v15.4h-v16.4h }, [x15]
66 st1 { v15.8h, v16.8h, v17.8h }, [x15]
70 st1 { v15.4h, v16.4h, v17.4h }, [x15]
103 st1 { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
107 st1 { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
140 st2 { v15.8h, v16.8h }, [x15]
144 st2 { v15.4h, v16.4h }, [x15]
[all …]
Dneon-simd-ldst-one-elem.s30 ld2r { v15.8h, v16.8h }, [x15]
34 ld2r { v15.4h, v16.4h }, [x15]
47 ld3r { v15.8h, v16.8h, v17.8h }, [x15]
51 ld3r { v15.4h, v16.4h, v17.4h }, [x15]
64 ld4r { v15.8h, v16.8h, v17.8h, v18.8h }, [x15]
68 ld4r { v15.4h, v16.4h, v17.4h, v18.4h }, [x15]
97 ld2 { v15.h, v16.h }[7], [x15]
106 ld3 { v15.h, v16.h, v17.h }[7], [x15]
115 ld4 { v15.h, v16.h, v17.h, v18.h }[7], [x15]
140 st2 { v15.h, v16.h }[7], [x15]
[all …]
Dneon-compare-instructions.s11 cmeq v15.4h, v16.4h, v17.4h
33 cmhs v15.4h, v16.4h, v17.4h
41 cmls v15.4h, v17.4h, v16.4h
70 cmge v15.4h, v16.4h, v17.4h
78 cmle v15.4h, v17.4h, v16.4h
107 cmhi v15.4h, v16.4h, v17.4h
115 cmlo v15.4h, v17.4h, v16.4h
144 cmgt v15.4h, v16.4h, v17.4h
152 cmlt v15.4h, v17.4h, v16.4h
179 cmtst v15.4h, v16.4h, v17.4h
[all …]
Dneon-mov.s12 movi v16.2s, #1, lsl #16
47 mvni v16.4s, #1, lsl #16
81 bic v16.4h, #1, lsl #8
114 orr v16.8h, #1, lsl #8
200 mov v15.16b, v16.16b
202 orr v15.16b, v16.16b, v16.16b
/external/boringssl/linux-aarch64/crypto/modes/
Dghashv8-armx.S17 ext v16.16b,v18.16b,v19.16b,#8 //t0=0xc2....01
20 and v18.16b,v18.16b,v16.16b
23 and v16.16b,v16.16b,v17.16b
25 eor v20.16b,v3.16b,v16.16b //twisted H
29 ext v16.16b,v20.16b,v20.16b,#8 //Karatsuba pre-processing
31 eor v16.16b,v16.16b,v20.16b
33 pmull v1.1q,v16.1d,v16.1d
52 ext v21.16b,v16.16b,v17.16b,#8 //pack Karatsuba pre-processed
123 ld1 {v16.2d},[x2],#16 //load [rotated] I[0]
126 rev64 v16.16b,v16.16b
[all …]
/external/libavc/common/armv8/
Dih264_inter_pred_luma_horz_hpel_vert_hpel_av8.s103 ld1 {v16.2s}, [x0], x2 // Vector load from src[4_0]
122 uaddl v26.8h, v13.8b, v16.8b
199 uaddl v24.8h, v15.8b, v16.8b
278 uaddl v24.8h, v16.8b, v17.8b
364 uaddl v26.8h, v16.8b, v13.8b
440 mov v12.16b, v16.16b
446 mov v16.8b, v24.8b
464 uaddl v16.8h, v2.8b, v8.8b
470 mls v12.8h, v16.8h , v24.8h
472 uaddl v16.8h, v6.8b, v8.8b
[all …]
Dih264_inter_pred_luma_horz_qpel_vert_hpel_av8.s164 ld1 {v16.2s}, [x0], x2 // Vector load from src[4_0]
184 uaddl v26.8h, v13.8b, v16.8b
267 uaddl v24.8h, v15.8b, v16.8b
351 uaddl v24.8h, v16.8b, v17.8b
442 uaddl v26.8h, v16.8b, v13.8b
523 mov v12.16b, v16.16b
531 mov v16.8b, v24.8b
549 uaddl v16.8h, v2.8b, v8.8b
555 mls v12.8h, v16.8h , v24.8h
557 uaddl v16.8h, v6.8b, v8.8b
[all …]
Dih264_weighted_bi_pred_av8.s204 ld1 {v16.8b}, [x0], x3 //load row 4 in source 1
214 uxtl v16.8h, v16.8b //converting row 4 in source 1 to 16-bit
218 mul v16.8h, v16.8h , v2.h[0] //weight 1 mult. for row 4
219 mla v16.8h, v18.8h , v2.h[2] //weight 2 mult. for row 4
224 srshl v16.8h, v16.8h , v0.8h //rounds off the weighted samples from row 4
228 saddw v16.8h, v16.8h , v3.8b //adding offset for row 4
231 sqxtun v16.8b, v16.8h //saturating row 4 to unsigned 8-bit
236 st1 {v16.8b}, [x2], x5 //store row 4 in destination
250 ld1 {v16.8b, v17.8b}, [x0], x3 //load row 4 in source 1
272 uxtl v22.8h, v16.8b //converting row 4L in source 1 to 16-bit
[all …]
Dih264_deblk_luma_av8.s115 ld1 {v16.s}[0], [x5] //D16[0] contains cliptab
118 tbl v14.8b, {v16.16b}, v12.8b //
121 dup v16.16b, w3 //Q8 contains beta
129 cmhs v24.16b, v24.16b, v16.16b
130 cmhs v26.16b, v26.16b, v16.16b
131 cmhi v20.16b, v16.16b , v28.16b //Q10=(Ap<Beta)
132 cmhi v22.16b, v16.16b , v30.16b //Q11=(Aq<Beta)
146 urhadd v16.16b, v6.16b , v0.16b //Q8 = ((p0+q0+1) >> 1)
147 mov v17.d[0], v16.d[1]
156 uaddl v10.8h, v16.8b, v10.8b //Q14,Q5 = p2 + (p0+q0+1)>>1
[all …]
Dih264_inter_pred_filters_luma_vert_av8.s137 uaddl v16.8h, v2.8b, v8.8b // temp2 = src[1_0] + src[4_0]
145 mls v14.8h, v16.8h , v24.8h // temp -= temp2 * 5
146 uaddl v16.8h, v2.8b, v0.8b
148 mla v16.8h, v12.8h , v22.8h
156 mls v16.8h, v18.8h , v24.8h
165 sqrshrun v30.8b, v16.8h, #5
167 uaddl v16.8h, v5.8b, v3.8b
169 mla v16.8h, v12.8h , v22.8h
178 mls v16.8h, v26.8h , v24.8h
187 sqrshrun v31.8b, v16.8h, #5
[all …]
Dih264_intra_pred_chroma_av8.s277 dup v16.8h, v0.h[1]
282 st1 {v16.8h}, [x1], x3
435 mul v16.8h, v12.8h , v8.8h
436 uzp1 v15.8h, v14.8h, v16.8h
437 uzp2 v16.8h, v14.8h, v16.8h
440 mov v17.d[0], v16.d[1]
443 addp v16.4h, v16.4h, v16.4h
447 addp v16.4h, v16.4h, v16.4h
453 smull v26.4s, v16.4h, v18.4h
499 mul v16.8h, v4.8h , v10.8h
[all …]
Dih264_inter_pred_luma_vert_qpel_av8.s144 uaddl v16.8h, v2.8b, v8.8b // temp2 = src[1_0] + src[4_0]
152 mls v14.8h, v16.8h , v24.8h // temp -= temp2 * 5
153 uaddl v16.8h, v2.8b, v0.8b
155 mla v16.8h, v12.8h , v22.8h
163 mls v16.8h, v18.8h , v24.8h
174 sqrshrun v30.8b, v16.8h, #5
176 uaddl v16.8h, v5.8b, v3.8b
178 mla v16.8h, v12.8h , v22.8h
189 mls v16.8h, v26.8h , v24.8h
198 sqrshrun v31.8b, v16.8h, #5
[all …]
/external/libavc/encoder/armv8/
Dih264e_evaluate_intra16x16_modes_av8.s172 uabdl v16.8h, v0.8b, v10.8b
192 uabal v16.8h, v2.8b, v10.8b
208 uabal v16.8h, v4.8b, v10.8b
224 uabal v16.8h, v6.8b, v10.8b
241 uabal v16.8h, v0.8b, v10.8b
257 uabal v16.8h, v2.8b, v10.8b
273 uabal v16.8h, v4.8b, v10.8b
290 uabal v16.8h, v6.8b, v10.8b
310 uabal v16.8h, v0.8b, v10.8b
327 uabal v16.8h, v2.8b, v10.8b
[all …]
Dih264e_evaluate_intra_chroma_modes_av8.s200 uabdl v16.8h, v0.8b, v10.8b
220 uabal v16.8h, v2.8b, v10.8b
237 uabal v16.8h, v4.8b, v10.8b
253 uabal v16.8h, v6.8b, v10.8b
272 uabal v16.8h, v0.8b, v10.8b
289 uabal v16.8h, v2.8b, v10.8b
306 uabal v16.8h, v4.8b, v10.8b
323 uabal v16.8h, v6.8b, v10.8b
340 add v16.8h, v16.8h , v18.8h
341 mov v18.d[0], v16.d[1]
[all …]
/external/boringssl/linux-aarch64/crypto/aes/
Daesv8-armx.S295 ld1 {v16.4s,v17.4s},[x3] // load key schedule...
310 eor v5.16b,v16.16b,v7.16b
317 aese v0.16b,v16.16b
325 aese v0.16b,v16.16b
333 ld1 {v16.4s},[x6]
340 aese v0.16b,v16.16b
342 ld1 {v16.4s},[x14]
349 aese v0.16b,v16.16b
359 ld1 {v16.16b},[x0],x8
362 eor v16.16b,v16.16b,v5.16b
[all …]

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