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/external/llvm/test/MC/ARM/
Dneont2-abs-encoding.s5 @ CHECK: vabs.s8 d16, d16 @ encoding: [0xf1,0xff,0x20,0x03]
6 vabs.s8 d16, d16
7 @ CHECK: vabs.s16 d16, d16 @ encoding: [0xf5,0xff,0x20,0x03]
8 vabs.s16 d16, d16
9 @ CHECK: vabs.s32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x03]
10 vabs.s32 d16, d16
11 @ CHECK: vabs.f32 d16, d16 @ encoding: [0xf9,0xff,0x20,0x07]
12 vabs.f32 d16, d16
13 @ CHECK: vabs.s8 q8, q8 @ encoding: [0xf1,0xff,0x60,0x03]
14 vabs.s8 q8, q8
[all …]
Dneon-abs-encoding.s3 @ CHECK: vabs.s8 d16, d16 @ encoding: [0x20,0x03,0xf1,0xf3]
4 vabs.s8 d16, d16
5 @ CHECK: vabs.s16 d16, d16 @ encoding: [0x20,0x03,0xf5,0xf3]
6 vabs.s16 d16, d16
7 @ CHECK: vabs.s32 d16, d16 @ encoding: [0x20,0x03,0xf9,0xf3]
8 vabs.s32 d16, d16
9 @ CHECK: vabs.f32 d16, d16 @ encoding: [0x20,0x07,0xf9,0xf3]
10 vabs.f32 d16, d16
11 @ CHECK: vabs.s8 q8, q8 @ encoding: [0x60,0x03,0xf1,0xf3]
12 vabs.s8 q8, q8
[all …]
Dsimple-fp-encoding.s53 vabs.f64 d16, d16
54 vabs.f32 s0, s0
56 @ CHECK: vabs.f64 d16, d16 @ encoding: [0xe0,0x0b,0xf0,0xee]
57 @ CHECK: vabs.f32 s0, s0 @ encoding: [0xc0,0x0a,0xb0,0xee]
Dsingle-precision-fp.s58 vabs.f64 d4, d5
66 @ CHECK-ERRORS-NEXT: vabs.f64 d4, d5
/external/llvm/test/CodeGen/ARM/
Dvabs.ll5 ;CHECK: vabs.s8
7 %tmp2 = call <8 x i8> @llvm.arm.neon.vabs.v8i8(<8 x i8> %tmp1)
13 ;CHECK: vabs.s16
15 %tmp2 = call <4 x i16> @llvm.arm.neon.vabs.v4i16(<4 x i16> %tmp1)
21 ;CHECK: vabs.s32
23 %tmp2 = call <2 x i32> @llvm.arm.neon.vabs.v2i32(<2 x i32> %tmp1)
29 ;CHECK: vabs.f32
37 ;CHECK: vabs.s8
39 %tmp2 = call <16 x i8> @llvm.arm.neon.vabs.v16i8(<16 x i8> %tmp1)
45 ;CHECK: vabs.s16
[all …]
Dneon_vabs.ll5 ; CHECK: vabs.s32 q
14 ; CHECK: vabs.s32 q
23 ; CHECK: vabs.s16 q
32 ; CHECK: vabs.s8 q
41 ; CHECK: vabs.s32 q
50 ; CHECK: vabs.s32 d
59 ; CHECK: vabs.s32 d
68 ; CHECK: vabs.s16 d
77 ; CHECK: vabs.s8 d
86 ; CHECK: vabs.s32 d
Dfabss.ll17 ; VFP2: vabs.f32 s
20 ; NFP1: vabs.f32 d
22 ; NFP0: vabs.f32 s
26 ; CORTEXA8: vabs.f32 {{d[0-9]+}}, [[D1]]
29 ; CORTEXA9: vabs.f32 s{{.}}, s{{.}}
Dfabs-neon.ll4 ; CHECK: vabs.f32 q0, q0
12 ; CHECK: vabs.f32 d0, d0
27 ; vabs.f32 d16, d16
40 ; CHECK-NOT: vabs
51 ; CHECK-NOT: vabs
D2012-08-27-CopyPhysRegCrash.ll43 %28 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %26) nounwind
57 %42 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %36) nounwind
58 %43 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %41) nounwind
80 %65 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %60) nounwind
87 %72 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> undef) nounwind
88 %73 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %71) nounwind
96 %81 = tail call <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16> %80) nounwind
129 declare <8 x i16> @llvm.arm.neon.vabs.v8i16(<8 x i16>) nounwind readnone
Dvfp.ll19 ;CHECK: vabs.f32
23 ;CHECK: vabs.f64
Dfparith.ll95 ;CHECK: vabs.f64
/external/libvpx/libvpx/vp8/encoder/arm/neon/
Dfastquantizeb_neon.asm37 vabs.s16 q4, q0 ; calculate x = abs(z)
38 vabs.s16 q5, q1
57 vabs.s16 q10, q0 ; calculate x2 = abs(z_2)
58 vabs.s16 q11, q1
170 vabs.s16 q12, q0 ; calculate x = abs(z)
171 vabs.s16 q13, q1
/external/libavc/common/arm/
Dih264_resi_trans_quant_a9.s185 vabs.s16 q0, q12 @Abs val of row 1 blk 1
187 vabs.s16 q1, q13 @Abs val of row 2 blk 1
380 vabs.s16 q0, q12 @Abs val of row 1 blk 1
382 vabs.s16 q1, q13 @Abs val of row 2 blk 1
524 vabs.s16 q5, q0
525 vabs.s16 q6, q1
641 vabs.s32 q2, q0
642 vabs.s32 q3, q1
Dih264_deblk_chroma_a9.s308 vabs.s8 q3, q4 @Q4 = ABS (i_macro)
437 vabs.s16 q7, q7
438 vabs.s16 q8, q8
635 vabs.s16 q14, q14
950 vabs.s8 q3, q4 @Q4 = ABS (i_macro)
1091 vabs.s16 q7, q7
1092 vabs.s16 q8, q8
1314 vabs.s16 q14, q14
/external/llvm/test/MC/Disassembler/ARM/
Dfp-encoding.txt40 # CHECK: vabs.f64 d16, d16
43 # CHECK: vabs.f32 s0, s0
Dneont2.txt4 # CHECK: vabs.s8 d16, d16
6 # CHECK: vabs.s16 d16, d16
8 # CHECK: vabs.s32 d16, d16
10 # CHECK: vabs.f32 d16, d16
12 # CHECK: vabs.s8 q8, q8
14 # CHECK: vabs.s16 q8, q8
16 # CHECK: vabs.s32 q8, q8
18 # CHECK: vabs.f32 q8, q8
Dneon.txt4 # CHECK: vabs.s8 d16, d16
6 # CHECK: vabs.s16 d16, d16
8 # CHECK: vabs.s32 d16, d16
10 # CHECK: vabs.f32 d16, d16
12 # CHECK: vabs.s8 q8, q8
14 # CHECK: vabs.s16 q8, q8
16 # CHECK: vabs.s32 q8, q8
18 # CHECK: vabs.f32 q8, q8
/external/v8/test/cctest/
Dtest-disasm-arm.cc455 COMPARE(vabs(d0, d1), in TEST()
457 COMPARE(vabs(d3, d4, mi), in TEST()
610 COMPARE(vabs(d16, d31), in TEST()
Dtest-assembler-arm.cc295 __ vabs(d0, d1);
298 __ vabs(d0, d2);
1060 __ vabs(d17, d17);
/external/llvm/test/CodeGen/Thumb2/
Dfloat-intrinsics-float.ll111 ; HARD: vabs.f32
Dfloat-intrinsics-double.ll115 ; DP: vabs.f64 d0, d0
/external/libhevc/common/arm/
Dihevc_inter_pred_chroma_vert_w16out.s120 vabs.s8 d3,d0 @vabs_s8(coeff)
Dihevc_inter_pred_chroma_vert.s119 vabs.s8 d3,d0 @vabs_s8(coeff)
Dihevc_inter_pred_filters_luma_vert_w16inp.s117 @vabs.s8 d0,d0 @vabs_s8(coeff)
Dihevc_inter_pred_luma_vert_w16inp_w16out.s125 @vabs.s8 d0,d0 @vabs_s8(coeff)

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