| /external/icu/icu4c/source/data/mappings/ |
| D | lmb-excp.ucm | 19 <subchar> \x01\x3f
29 <U0027> \x01\x27 |0
30 <U005E> \x01\x23 |0
31 <U005E> \x01\x33 |3 # R5 compatibility
32 <U005E> \x01\x6D |3 # R5 compatibility
33 <U0060> \x01\x24 |0
34 <U0060> \x01\x34 |3 # R5 compatibility
35 <U007E> \x01\x21 |0
36 <U007E> \x01\x31 |3 # R5 compatibility
37 <U007E> \x01\x6C |3 # R5 compatibility
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AI1cmp-arm.txt | 4 # CHECK: 0x01 0x10 0x50 0x03
5 0x01 0x10 0x50 0x03
8 # CHECK: 0x82 0x10 0x50 0x01
9 0x82 0x10 0x50 0x01
12 # CHECK: 0x02 0x10 0x50 0x01
13 0x02 0x10 0x50 0x01
16 # CHECK: 0x1f 0x01 0x52 0x01
17 0x1f 0x01 0x52 0x01
20 # CHECK: 0x10 0x11 0x52 0x01
21 0x10 0x11 0x52 0x01
[all …]
|
| D | unpredictable-swp-arm.txt | 4 # CHECK: 0x9f 0x10 0x03 0x01
5 0x9f 0x10 0x03 0x01
8 # CHECK: 0x90 0xf0 0x03 0x01
9 0x90 0xf0 0x03 0x01
12 # CHECK: 0x90 0x1f 0x03 0x01
13 0x90 0x1f 0x03 0x01
16 # CHECK: 0x90 0x10 0x0f 0x01
17 0x90 0x10 0x0f 0x01
20 # CHECK: 0x90 0x10 0x01 0x01
21 0x90 0x10 0x01 0x01
[all …]
|
| D | invalid-armv8.txt | 8 [0x00 0x01 0x00 0xee]
11 # CHECK-NEXT: [0x00 0x01 0x00 0xee]
23 [0x00 0x01 0x00 0xfe]
26 # CHECK-NEXT: [0x00 0x01 0x00 0xfe]
38 [0x10 0x01 0x00 0xee]
41 # CHECK-NEXT: [0x10 0x01 0x00 0xee]
43 [0x10 0x01 0x00 0xfe]
46 # CHECK-NEXT: [0x10 0x01 0x00 0xfe]
58 [0x10 0x01 0x10 0xee]
61 # CHECK-NEXT: [0x10 0x01 0x10 0xee]
[all …]
|
| D | invalid-thumbv8.txt | 8 [0x00 0xee 0x00 0x01]
11 # CHECK-NEXT: [0x00 0xee 0x00 0x01]
23 [0x00 0xfe 0x00 0x01]
26 # CHECK-NEXT: [0x00 0xfe 0x00 0x01]
38 [0x00 0xee 0x10 0x01]
41 # CHECK-NEXT: [0x00 0xee 0x10 0x01]
43 [0x00 0xfe 0x10 0x01]
46 # CHECK-NEXT: [0x00 0xfe 0x10 0x01]
58 [0x10 0xee 0x10 0x01]
61 # CHECK-NEXT: [0x10 0xee 0x10 0x01]
[all …]
|
| D | unpredictable-MRS-arm.txt | 4 # CHECK: 0x00 0xf0 0x0f 0x01
5 0x00 0xf0 0x0f 0x01
8 # CHECK: 0x00 0xf0 0x4f 0x01
9 0x00 0xf0 0x4f 0x01
12 # CHECK: 0x0f 0x0d 0x01 0x01
13 0x0f 0x0d 0x01 0x01
16 # CHECK: 0x0f 0x0d 0x40 0x01
17 0x0f 0x0d 0x40 0x01
|
| D | unpredictable-ADDREXT3-arm.txt | 4 # CHECK: 0xd1 0xf1 0x5f 0x01
5 0xd1 0xf1 0x5f 0x01
7 # CHECK: 0xf1 0xf1 0x5f 0x01
8 0xf1 0xf1 0x5f 0x01
10 # CHECK: 0xf1 0xf1 0x5f 0x01
11 0xf1 0xf1 0x5f 0x01
13 # CHECK: 0xd1 0xe1 0x4f 0x01
14 0xd1 0xe1 0x4f 0x01
|
| D | unpredictable-MUL-arm.txt | 4 # CHECK: 0x93 0x12 0x01 0x00
5 0x93 0x12 0x01 0x00
8 # CHECK: 0x92 0x0f 0x01 0x00
9 0x92 0x0f 0x01 0x00
12 # CHECK: 0x9f 0x02 0x01 0x00
13 0x9f 0x02 0x01 0x00
16 # CHECK: 0x92 0x01 0x0f 0x00
17 0x92 0x01 0x0f 0x00
|
| /external/icu/icu4c/source/test/testdata/ |
| D | test3.ucm | 29 <U00c0> \x05+\x01\x02\x0d |0
30 <U00c0> \x05+\x01\x02\x0e |3
41 <U101234>+<U50005>+<U60006> \x07+\x00+\x01\x02\x0f+\x09 |0
42 <U101234>+<U50005> \x07+\x00+\x01\x02\x0e+\x05 |0
43 <U101234>+<U60006> \x07+\x00+\x01\x02\x0f+\x06 |0
44 <U101234>+<U70007> \x07+\x00+\x01\x02\x0f |1
50 <U00c4><U00c4><U101234><U0005> \x05+\x01\x02\x0c |0
53 <U23456> \x01\x02\x0a |0
54 <U000b> \x01\x02\x0b |0
55 #unassigned \x01\x02\x0c
[all …]
|
| D | test2.ucm | 28 <U00c0> \x05+\x01\x0d |0
29 <U00c0> \x05+\x01\x0e |3
40 <U101234>+<U50005>+<U60006> \x07+\x00+\x01\x0f+\x09 |0
41 <U101234>+<U50005> \x07+\x00+\x01\x0e+\x05 |0
42 <U101234>+<U60006> \x07+\x00+\x01\x0f+\x06 |0
43 <U101234>+<U70007> \x07+\x00+\x01\x0f |1
49 <U00c4><U00c4><U101234><U0005> \x05+\x01\x0c |0
52 <U23456> \x01\x0a |0
53 <U000b> \x01\x0b |0
54 #unassigned \x01\x0c
[all …]
|
| D | test4.ucm | 46 <U23456> \x01\x02\x03\x0a |0
47 <U000b> \x01\x02\x03\x0b |0
48 #unassigned \x01\x02\x03\x0c
49 <U34567> \x01\x02\x03\x0d |3
50 <U000e> \x01\x02\x03\x0e |3
51 #unassigned \x01\x02\x03\x0f
59 <U30ab><U309a> \x01\x02\x03\x0a\x01\x02\x03\x0b\x01\x02\x03\x0c\x01\x02\x03\x0d\x01\x02\x03\x0e\x01…
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrSVM.td | 19 def VMMCALL : I<0x01, MRM_D9, (outs), (ins), "vmmcall", []>, TB;
22 def STGI : I<0x01, MRM_DC, (outs), (ins), "stgi", []>, TB;
25 def CLGI : I<0x01, MRM_DD, (outs), (ins), "clgi", []>, TB;
29 def SKINIT : I<0x01, MRM_DE, (outs), (ins), "skinit\t{%eax|eax}", []>, TB;
33 def VMRUN32 : I<0x01, MRM_D8, (outs), (ins),
36 def VMRUN64 : I<0x01, MRM_D8, (outs), (ins),
41 def VMLOAD32 : I<0x01, MRM_DA, (outs), (ins),
44 def VMLOAD64 : I<0x01, MRM_DA, (outs), (ins),
49 def VMSAVE32 : I<0x01, MRM_DB, (outs), (ins),
52 def VMSAVE64 : I<0x01, MRM_DB, (outs), (ins),
[all …]
|
| /external/boringssl/src/crypto/poly1305/ |
| D | poly1305_arm_asm.S | 64 # qhasm: reg128 x01
219 # qhasm: x01 aligned= mem128[input_0];input_0+=16
220 # asm 1: vld1.8 {>x01=reg128#9%bot->x01=reg128#9%top},[<input_0=int32#1,: 128]!
221 # asm 2: vld1.8 {>x01=d16->x01=d17},[<input_0=r0,: 128]!
462 # qhasm: r4[0,1] += x01[0] unsigned* z34[2]; r4[2,3] += x01[1] unsigned* z34[3]
463 # asm 1: vmlal.u32 <r4=reg128#16,<x01=reg128#9%bot,<z34=reg128#6%top
464 # asm 2: vmlal.u32 <r4=q15,<x01=d16,<z34=d11
477 # qhasm: r4[0,1] += x01[2] unsigned* z34[0]; r4[2,3] += x01[3] unsigned* z34[1]
478 # asm 1: vmlal.u32 <r4=reg128#16,<x01=reg128#9%top,<z34=reg128#6%bot
479 # asm 2: vmlal.u32 <r4=q15,<x01=d17,<z34=d10
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | thumb2-narrow-dp.ll | 29 // CHECK: ands.w r0, r2, r1 @ encoding: [0x12,0xea,0x01,0x00]
32 // CHECK: ands.w r0, r0, r1 @ encoding: [0x10,0xea,0x01,0x00]
34 // CHECK: and.w r0, r1, r0 @ encoding: [0x01,0xea,0x00,0x00]
38 // CHECK: ands.w r8, r8, r1 @ encoding: [0x18,0xea,0x01,0x08]
40 // CHECK: ands.w r1, r1, r8 @ encoding: [0x11,0xea,0x08,0x01]
73 // CHECK: andeq.w r0, r2, r1 @ encoding: [0x02,0xea,0x01,0x00]
79 // CHECK: andeq.w r0, r0, r1 @ encoding: [0x00,0xea,0x01,0x00]
81 // CHECK: andeq.w r2, r1, r2 @ encoding: [0x01,0xea,0x02,0x02]
89 // CHECK: andeq.w r8, r1, r8 @ encoding: [0x01,0xea,0x08,0x08]
91 // CHECK: andeq.w r8, r8, r1 @ encoding: [0x08,0xea,0x01,0x08]
[all …]
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| D | mips32_le.txt | 33 0x4c 0x01 0x00 0x10
36 0x4c 0x01 0x00 0x45
39 0x4c 0x01 0x1c 0x45
42 0x4c 0x01 0x01 0x45
45 0x4c 0x01 0x1d 0x45
48 0x4c 0x01 0x26 0x11
51 0x4c 0x01 0xc1 0x04
54 0x4c 0x01 0xd1 0x04
57 0x4c 0x01 0xc0 0x1c
60 0x4c 0x01 0xc0 0x18
[all …]
|
| D | mips32.txt | 34 0x10 0x00 0x01 0x4c
37 0x45 0x00 0x01 0x4c
40 0x45 0x1c 0x01 0x4c
43 0x45 0x01 0x01 0x4c
46 0x45 0x1d 0x01 0x4c
49 0x11 0x26 0x01 0x4c
52 0x04 0xc1 0x01 0x4c
55 0x04 0xd1 0x01 0x4c
58 0x1c 0xc0 0x01 0x4c
61 0x18 0xc0 0x01 0x4c
[all …]
|
| D | mips32r6.txt | 14 0x45 0x20 0x00 0x01 # CHECK: bc1eqz $f0,
15 0x45 0x3f 0x00 0x01 # CHECK: bc1eqz $f31,
16 0x45 0xa0 0x00 0x01 # CHECK: bc1nez $f0,
17 0x45 0xbf 0x00 0x01 # CHECK: bc1nez $f31,
29 0x20 0x02 0x01 0x4d # CHECK: beqzalc $2,
31 0x60 0x02 0x01 0x4d # CHECK: bnezalc $2,
35 0x18 0x42 0x01 0x4d # CHECK: bgezalc $2,
39 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2,
41 0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2,
44 0x18 0x02 0x01 0x4d # CHECK: blezalc $2,
[all …]
|
| D | mips64_le.txt | 12 0x1f 0x00 0x38 0x01
21 0x1c 0x00 0x7a 0x01
33 0xbb 0x0f 0x01 0x00
51 0x01 0x00 0x01 0x3c
57 0x01 0x00 0x1f 0x3c
|
| /external/llvm/test/MC/Disassembler/Mips/mips32r6/ |
| D | valid-mips32r6.txt | 12 0x45 0x20 0x00 0x01 # CHECK: bc1eqz $f0, 8
13 0x45 0x3f 0x00 0x01 # CHECK: bc1eqz $f31, 8
14 0x45 0xa0 0x00 0x01 # CHECK: bc1nez $f0, 8
15 0x45 0xbf 0x00 0x01 # CHECK: bc1nez $f31, 8
21 0x20 0x02 0x01 0x4d # CHECK: beqzalc $2, 1332
23 0x60 0x02 0x01 0x4d # CHECK: bnezalc $2, 1332
27 0x18 0x42 0x01 0x4d # CHECK: bgezalc $2, 1332
31 0x1c 0x02 0x01 0x4d # CHECK: bgtzalc $2, 1332
33 0x1c 0x42 0x01 0x4d # CHECK: bltzalc $2, 1332
36 0x18 0x02 0x01 0x4d # CHECK: blezalc $2, 1332
[all …]
|
| D | valid-mips32r6-el.txt | 12 0x01 0x00 0x20 0x45 # CHECK: bc1eqz $f0, 8
13 0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8
14 0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8
15 0x01 0x00 0xbf 0x45 # CHECK: bc1nez $f31, 8
21 0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1332
23 0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1332
27 0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1332
31 0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1332
33 0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1332
36 0x4d 0x01 0x02 0x18 # CHECK: blezalc $2, 1332
[all …]
|
| /external/llvm/test/MC/Disassembler/SystemZ/ |
| D | insns.txt | 29 0xed 0x01 0xff 0xff 0x00 0x1a
62 0xed 0x01 0xff 0xff 0x00 0x0a
80 0xc2 0x09 0x00 0x00 0x00 0x01
98 0xc2 0x08 0x00 0x00 0x00 0x01
128 0xe3 0x00 0x00 0x01 0x00 0x18
140 0xe3 0x01 0xff 0xff 0x7f 0x18
158 0xa7 0x0b 0x00 0x01
167 0xec 0x01 0x80 0x00 0x00 0xd9
176 0xec 0x67 0x00 0x01 0x00 0xd9
209 0xeb 0x00 0x00 0x01 0x00 0x7a
[all …]
|
| /external/llvm/test/MC/Disassembler/Hexagon/ |
| D | cr.txt | 11 0x01 0xc0 0x82 0x6b
13 0x01 0xc0 0xa2 0x6b
45 0x01 0xc3 0x02 0x6b
49 0x01 0xc3 0x22 0x6b
53 0x01 0xc3 0x42 0x6b
57 0x01 0xc2 0x63 0x6b
65 0x01 0xc0 0xc2 0x6b
69 0x01 0xc2 0xe3 0x6b
|
| /external/llvm/test/MC/Disassembler/Mips/msa/ |
| D | test_lsa.txt | 3 0x01 0x2a 0x40 0x05 # CHECK: lsa $8, $9, $10, 1
4 0x01 0x2a 0x40 0x45 # CHECK: lsa $8, $9, $10, 2
5 0x01 0x2a 0x40 0x85 # CHECK: lsa $8, $9, $10, 3
6 0x01 0x2a 0x40 0xc5 # CHECK: lsa $8, $9, $10, 4
|
| D | test_dlsa.txt | 3 0x01 0x2a 0x40 0x15 # CHECK: dlsa $8, $9, $10, 1
4 0x01 0x2a 0x40 0x55 # CHECK: dlsa $8, $9, $10, 2
5 0x01 0x2a 0x40 0x95 # CHECK: dlsa $8, $9, $10, 3
6 0x01 0x2a 0x40 0xd5 # CHECK: dlsa $8, $9, $10, 4
|
| /external/llvm/test/MC/Disassembler/Mips/mips64r6/ |
| D | valid-mips64r6-el.txt | 12 0x01 0x00 0x20 0x45 # CHECK: bc1eqz $f0, 8
13 0x01 0x00 0x3f 0x45 # CHECK: bc1eqz $f31, 8
14 0x01 0x00 0xa0 0x45 # CHECK: bc1nez $f0, 8
15 0x01 0x00 0xbf 0x45 # CHECK: bc1nez $f31, 8
21 0x4d 0x01 0x02 0x20 # CHECK: beqzalc $2, 1332
23 0x4d 0x01 0x02 0x60 # CHECK: bnezalc $2, 1332
27 0x4d 0x01 0x42 0x18 # CHECK: bgezalc $2, 1332
31 0x4d 0x01 0x02 0x1c # CHECK: bgtzalc $2, 1332
33 0x4d 0x01 0x42 0x1c # CHECK: bltzalc $2, 1332
36 0x4d 0x01 0x02 0x18 # CHECK: blezalc $2, 1332
[all …]
|