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/frameworks/base/docs/html/ndk/guides/
Dcpu-features.jd35 insert an instruction to import the {@code android/cpufeatures} module. For example:
96 <dd>Indicates that the device's CPU supports the VFPv2 instruction set. Most ARMv6 CPUs support
97 this instruction set.</dd>
100 <dd>Indicates that the device's CPU supports the ARMv7-A instruction set as supported by the
101 <a href="{@docRoot}ndk/guides/abis.html#v7a">armeabi-v7a</a> ABI. This instruction set supports both
103 FPU instruction-set extension.</dd>
106 <dd>Indicates that the device's CPU supports the VFPv3 hardware FPU instruction-set extension.
107 <p>This value is equivalent to the {@code VFPv3-D16} instruction set, which provides provides only
116 <dd>Indicates that the device's CPU supports the ARM Advanced SIMD (NEON) vector instruction set
126 instruction set. Also part of the VFPv4 specification.</dd>
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Dabis.jd16 <p>Different Android handsets use different CPUs, which in turn support different instruction sets.
17 Each combination of CPU and instruction sets has its own Application Binary Interface, or
25 <li>The CPU instruction set(s) that the machine code should use.</li>
41 <p>Each ABI supports one or more instruction sets. Table 1 provides an at-a-glance overview of
42 the instruction sets each ABI supports.</p>
45 <strong>Table 1.</strong> ABIs and supported instruction sets.</p>
116 the ARMv5TE instruction set. Please refer to the following documentation for
159 Thumb (a.k.a. Thumb-1) instruction set</a>. The NDK generates Thumb
168 CPU instruction set extensions</a>. The instruction extensions that this Android-specific
172 <li>The Thumb-2 instruction set extension, which provides performance comparable to 32-bit ARM
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Dcpu-arm-neon.jd18 <p>The NDK supports the ARM Advanced SIMD, an optional instruction-set extension of the ARMv7 spec.
54 ARM instruction set for non-NEON instructions. In such a definition, {@code arm} must come before
Dmips.jd16 that have CPUs supporting the MIPS32 instruction set.</p>
Dx86-64.jd19 Android-based devices using CPUs that support the 64-bit x86 instruction set.</p>
Dapplication_mk.jd123 settings for different instruction sets.</p>
126 <strong>Table 1.</strong> {@code APP_ABI} settings for different instruction sets.</p>
157 <td>All supported instruction sets</td>
Dx86.jd20 Android-based devices running on CPUs supporting the IA-32 instruction set.</p>
Dstandalone_toolchain.jd38 <strong>Table 1.</strong> {@code APP_ABI} settings for different instruction sets.</p>
327 For more information on specifying a 64- or 32-bit instruction host toolchain, see
Dandroid_mk.jd544 instruction is 16 bits wide and linked with the STL libraries in the {@code thumb/} directory.
575 <p>Note that not all ARMv7-based CPUs support the NEON instruction set extensions. For this reason,
/frameworks/base/telephony/java/com/android/internal/telephony/
DITelephony.aidl578 String iccTransmitApduLogicalChannel(int channel, int cla, int instruction, in iccTransmitApduLogicalChannel() argument
596 String iccTransmitApduBasicChannel(int cla, int instruction, in iccTransmitApduBasicChannel() argument
/frameworks/opt/telephony/src/java/com/android/internal/telephony/sip/
DSipCommandInterface.java581 public void iccTransmitApduLogicalChannel(int channel, int cla, int instruction, in iccTransmitApduLogicalChannel() argument
586 public void iccTransmitApduBasicChannel(int cla, int instruction, int p1, int p2, in iccTransmitApduBasicChannel() argument
/frameworks/opt/telephony/src/java/com/android/internal/telephony/imsphone/
DImsPhoneCommandInterface.java578 public void iccTransmitApduLogicalChannel(int channel, int cla, int instruction, in iccTransmitApduLogicalChannel() argument
582 public void iccTransmitApduBasicChannel(int cla, int instruction, int p1, int p2, in iccTransmitApduBasicChannel() argument
/frameworks/opt/telephony/src/java/com/android/internal/telephony/
DCommandsInterface.java1828 public void iccTransmitApduLogicalChannel(int channel, int cla, int instruction, in iccTransmitApduLogicalChannel() argument
1846 public void iccTransmitApduBasicChannel(int cla, int instruction, int p1, int p2, in iccTransmitApduBasicChannel() argument
DRIL.java4678 public void iccTransmitApduLogicalChannel(int channel, int cla, int instruction, in iccTransmitApduLogicalChannel() argument
4686 instruction, p1, p2, p3, data, response); in iccTransmitApduLogicalChannel()
4693 public void iccTransmitApduBasicChannel(int cla, int instruction, int p1, int p2, in iccTransmitApduBasicChannel() argument
4695 iccTransmitApduHelper(RIL_REQUEST_SIM_TRANSMIT_APDU_BASIC, 0, cla, instruction, in iccTransmitApduBasicChannel()
4703 int instruction, int p1, int p2, int p3, String data, Message response) { in iccTransmitApduHelper() argument
4707 rr.mParcel.writeInt(instruction); in iccTransmitApduHelper()
/frameworks/opt/telephony/tests/telephonytests/src/com/android/internal/telephony/gsm/
DUsimDataDownloadCommands.java.broken674 public void iccTransmitApduLogicalChannel(int channel, int cla, int instruction,
679 public void iccTransmitApduBasicChannel(int cla, int instruction, int p1, int p2,
/frameworks/base/docs/html/training/articles/
Dsmp.jd148 instruction reordering performed by compilers just yet.</p>
348 store is <em>initiated</em> when the CPU executes the instruction. At some
404 <p>Recall that all addresses are initially zero. The “loop_until” instruction
579 <p>Different CPUs provide different flavors of barrier instruction. For
583 <li>Sparc V8 has a “membar” instruction that takes a 4-element bit vector. The
597 synchronous “flush” instructions. The ARM “dmb” instruction has no direct
680 #0 and replacing the last instruction with LDRNE r2, [r3, r1] would ensure
682 you can’t think about consistency issues in terms of instruction execution.
811 conditional store instruction is used to try to write the data back. If the
895 barrier instruction. Second, it tells the compiler that it is not allowed to
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Dperf-tips.jd146 use a relatively inexpensive "string constant" instruction instead of a
/frameworks/base/telephony/java/android/telephony/
DTelephonyManager.java2967 int instruction, int p1, int p2, int p3, String data) { in iccTransmitApduLogicalChannel() argument
2972 instruction, p1, p2, p3, data); in iccTransmitApduLogicalChannel()
2999 int instruction, int p1, int p2, int p3, String data) { in iccTransmitApduBasicChannel() argument
3004 instruction, p1, p2, p3, data); in iccTransmitApduBasicChannel()
/frameworks/opt/telephony/src/java/com/android/internal/telephony/test/
DSimulatedCommands.java1730 public void iccTransmitApduLogicalChannel(int channel, int cla, int instruction, in iccTransmitApduLogicalChannel() argument
1736 public void iccTransmitApduBasicChannel(int cla, int instruction, int p1, int p2, in iccTransmitApduBasicChannel() argument
/frameworks/base/docs/html/ndk/downloads/
Dindex.jd430 generates {@code llvm.cttz.v2i64()}, an instruction with no counterpart in the ARM
431 instruction set.</li>
Drevision_history.jd286 instruction sets: AES, CRC32, SHA2, SHA1, and 64-bit PMULL/PMULL2. (Issue
555 ARM GCC 4.8/4.9. This optimization sometimes reduces instruction count when accessing global
1134 {@code blx pc} Thumb instruction.
1248 an undefined instruction (or trap in debug mode) at the path without a return
2254 on the instruction set information included in your application ? no action is needed on your part
2831 instruction addresses into a readable format that contains things such
2947 The previous binary generated invalid thumb instruction sequences when
3114 include these CPU instruction set extensions:
3136 <li>Lets you generate machine code for either or both of the instruction sets supported
3143 instruction set information included in your application &mdash; no action is needed on
/frameworks/base/docs/html/guide/topics/manifest/
Dactivity-element.jd498 <dd>An instruction on how the activity should be launched. There are four modes
523 instruction, in which case a different task is chosen &mdash; see the
/frameworks/base/docs/html/tools/help/
DMonkeyDevice.jd1239 The name of the native code instruction set, in the form CPU type plus
/frameworks/base/docs/html/guide/components/
Dtasks-and-back-stack.jd303 launchMode}</a> attribute specifies an instruction on how the activity should be launched into a
/frameworks/base/docs/html/guide/practices/
Doptimizing-for-3.0.jd130 the Android emulator must simulate the ARM instruction set on your computer and the WXGA screen is

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