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Searched defs:op1 (Results 1 – 7 of 7) sorted by relevance

/art/compiler/dex/quick/x86/
Dquick_assemble_x86_test.cc138 int opcode, int op0 = 0, int op1 = 0, int op2 = 0, int op3 = 0, int op4 = 0) { in Test()
/art/compiler/dex/quick/
Dmir_to_lir-inl.h47 int op1, int op2, int op3, int op4, LIR* target) { in RawLIR()
Dralloc_util.cc1328 const Mir2Lir::RefCounts* op1 = reinterpret_cast<const Mir2Lir::RefCounts*>(val1); in SortCounts() local
/art/compiler/utils/arm/
Dassembler_thumb2.cc190 uint32_t op1 = 0U /* 0b000 */; in mul() local
209 uint32_t op1 = 0U /* 0b000 */; in mla() local
227 uint32_t op1 = 0U /* 0b000 */; in mls() local
245 uint32_t op1 = 2U /* 0b010; */; in umull() local
262 uint32_t op1 = 1U /* 0b001 */; in sdiv() local
279 uint32_t op1 = 1U /* 0b001 */; in udiv() local
/art/disassembler/
Ddisassembler_arm.cc251 uint32_t op1 = (instruction >> 25) & 0x7; in DumpArm() local
480 uint32_t op1 = (instr >> 27) & 3; in DumpThumb32() local
/art/compiler/optimizing/
Dintrinsics_arm64.cc362 Location op1 = locations->InAt(0); in GenMinMaxFP() local
421 Location op1 = locations->InAt(0); in GenMinMax() local
Dintrinsics_arm.cc313 Register op1 = locations->InAt(0).AsRegister<Register>(); in GenMinMax() local