Home
last modified time | relevance | path

Searched defs:orr (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/MC/ARM/
Darm-arithmetic-aliases.s36 orr r2, r2, #6 label
37 orr r2, #6 label
38 orr r2, r2, r3 label
39 orr r2, r3 label
/external/llvm/test/MC/AArch64/
Darm64-diags.s258 orr w0, w0, w0, lsl #32 label
/external/v8/src/arm/
Dcodegen-arm.cc534 __ orr(lr, lr, Operand(1)); in GenerateSmiToDouble() local
845 __ orr(temp1, temp3, Operand(temp1, LSL, 20)); in EmitMathExp() local
848 __ orr(temp1, temp2, Operand(temp1, LSL, 20)); in EmitMathExp() local
Dcode-stubs-arm.cc205 __ orr(result_reg, result_reg, in Generate() local
207 __ orr(result_reg, scratch_low, Operand(result_reg, LSL, scratch)); in Generate() local
261 __ orr(scratch(), scratch(), Operand(HeapNumber::kSignMask), LeaveCC, cs); in Generate() local
270 __ orr(scratch(), scratch(), Operand(the_int(), LSR, shift_distance)); in Generate() local
370 __ orr(r0, r3, Operand(r2), SetCC); in EmitIdenticalObjectComparison() local
494 __ orr(r2, r2, Operand(r3)); in EmitStrictTwoHeapObjectCompare() local
602 __ orr(r2, r1, r0); in GenerateGeneric() local
3314 __ orr(r2, r1, r0); in GenerateSmis() local
3428 __ orr(tmp1, tmp1, Operand(tmp2)); in GenerateInternalizedStrings() local
3510 __ orr(tmp3, tmp1, tmp2); in GenerateStrings() local
[all …]
Dregexp-macro-assembler-arm.cc264 __ orr(r3, r3, Operand(0x20)); // Convert capture character to lower-case. in CheckNotBackReferenceIgnoreCase() local
265 __ orr(r4, r4, Operand(0x20)); // Also convert input character. in CheckNotBackReferenceIgnoreCase() local
Dfull-codegen-arm.cc1046 __ orr(r2, r1, r0); in VisitSwitchStatement() local
2378 __ orr(scratch1, left, Operand(right)); in EmitInlineSmiBinaryOp() local
2439 __ orr(right, left, Operand(right)); in EmitInlineSmiBinaryOp() local
3177 __ orr(r2, r2, Operand(1 << Map::kStringWrapperSafeForDefaultValueOf)); in EmitIsStringWrapperSafeForDefaultValueOf() local
4677 __ orr(r2, r0, Operand(r1)); in VisitCompareOperation() local
Dassembler-arm.cc1458 void Assembler::orr(Register dst, Register src1, const Operand& src2, in orr() function in v8::internal::Assembler
Dlithium-codegen-arm.cc1748 __ orr(result, left, right); in DoBitI() local
/external/v8/src/compiler/arm/
Dcode-generator-arm.cc230 __ orr(i.OutputRegister(), i.InputRegister(0), i.InputOperand2(1), in AssembleArchInstruction() local
/external/v8/test/cctest/
Dtest-assembler-arm.cc446 __ orr(r2, r2, Operand(mode)); in TestRoundingMode() local
Dtest-assembler-arm64.cc518 TEST(orr) { in TEST() argument
8142 __ orr(xzr, x0, x6); in TEST() local
8143 __ orr(xzr, x6, xzr); in TEST() local
8144 __ orr(xzr, xzr, x6); in TEST() local
/external/v8/src/arm64/
Dassembler-arm64.cc1212 void Assembler::orr(const Register& rd, in orr() function in v8::internal::Assembler
/external/vixl/src/vixl/a64/
Dassembler-a64.cc990 void Assembler::orr(const Register& rd, in orr() function in vixl::Assembler
3327 void Assembler::orr(const VRegister& vd, in orr() function in vixl::Assembler
Dlogic-a64.cc1194 LogicVRegister Simulator::orr(VectorFormat vform, in orr() function in vixl::Simulator
2420 LogicVRegister Simulator::orr(VectorFormat vform, in orr() function in vixl::Simulator
/external/vixl/test/
Dtest-assembler-a64.cc514 TEST(orr) { in TEST() argument
12370 __ orr(xzr, x0, x6); in TEST() local
12371 __ orr(xzr, x6, xzr); in TEST() local
12372 __ orr(xzr, xzr, x6); in TEST() local